New York University

The University of Texas System

Muhammad Yasin

Ozgur Sinanoglu

Jeyavijayan Rajendran

Jeyavijayan Rajendra

An exemplary system, method and computer-accessible medium for modifying a design of an integrated circuit(s) (ICs), which can include, for example, modifying a logic gate(s) in the design for a protected input pattern(s), and providing a restoration unit(s) into the design, where the restoration unit(s) can be configured to (i) produce an error-free output(s) when a correct secret key can be applied to the restoration unit(s), and (ii) produce an erroneous output(s) when an incorrect key can be applied to the restoration unit(s); and ensure that the modified design along with the restoration unit produces at least one erroneous output with respect to the original design for only a pre-determined constant number of incorrect keys based on at least one input pattern.

System, method and computer-accessible medium for stripped-functionality logic locking

Exemplary embodiment of the present disclosure can include, for example, a logic-locking circuit ('SARLock'), which can include a logic cone(s) receiving a distinguishing input pattern(s) (DIP), a comparator(s) receiving the DIP(s) and a key value(s), and a logic gate(s) connected to an output of the logic cone and to an output of the comparator. A mask(s) can be connected to the comparator(s) and the logic gate(s). The logic gate(s) can be a XOR gate(s). The comparator(s) can be configured to flip a signal(s) based on a combination of the DIP(s) and the key value(s). A mask(s) can be connected to the comparator(s) and the logic gate(s), which can be configured to prevent the flipped signal(s) from being asserted for a correct key value(s).

System, method and computer-accessible medium for satisfiability attack resistant logic locking

Exemplary embodiments of the present disclosure can include an exemplary system, method and computer-accessible medium for camouflaging a design of an integrated circuit(s) (IC), can include, for example, receiving information related to a plurality of input combinations to the ICs, and camouflaging the design of the ICs by limiting a discriminating ability of the input combination to a predetermined constant number of incorrect assignments. An incorrect output can be intentionally produced for a predetermined constant number of secret minterms of the ICs. An output of the ICs can be restored for the secret minterms using a CamoFix block. The CamoFix block can include a CamoInputMapping block(s), a CamoSecGen block(s) or a comparator block(s).

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Abu Dhabi, United Arab Emirates

Muhammad Yasin