Infineon Technologies Ag

Muhammad Hassan

Pedro Costa

Andre Roger

Alexander Zeh

Romain Ygnace

Jens Rosenbusch

Bernhard Rohfleisch

Taehoon Lee

Haram Kim

Testing of at least one source by a destination is provided, which comprises: (i) the destination supplies a test signal towards the at least one source; (ii) at the at least one source, determining a second output signal based on a first output signal and the test signal via a first function; (iii) conveying the second output signal to the destination; (iv) at the destination, determining a received signal based on the second output signal received from the at least one source and based on the test signal via a second function; and (v) determining whether an error occurred based on the received signal. Also, an according system is provided.

Signal test

A microcontroller unit includes at least one core, a plurality of safety fault management units, with each safety fault management unit including circuitry to detect one or more safety faults and to output an alarm signal in response to detection of one or more safety faults. The microcontroller further includes system control units operating in parallel to the at least one core. Each of the plurality of system control units can be coupled to at least one of the safety fault management units and can include hardware circuitry to generate and output a port emergency stop (PES) signal based on the alarm signals obtained from a safety fault management unit. The microcontroller includes port circuitries coupled to ports and to the system control units. The port circuitries can selectively cause a respectively connected port to enter a non-operational electronic state in response to receiving a PES signal.

Devices and methods for microcontroller port control

A data cryptographic device may include a pre-tweak generator to generate pre-tweak values, a pre-tweak value cache memory to store one or more pre-tweak values generated by the pre-tweak generator, and a pre-tweak value selector to check whether a pre-tweak value for an input memory address is stored in the pre-tweak value cache memory. The data cryptographic device may further include a tweak generator to generate a tweak value based on the selected pre-tweak value, and a block cipher to perform at least one block cipher algorithm to at least one of encrypt data, encrypt and authenticate data, decrypt encrypted data, decrypt and verify encrypted and authenticated data, using a cryptographic key and the generated tweak value.

Data cryptographic devices and memory systems

A memory dispatcher, including an address decoder configured to decode a write address of received write data; a lockstep processor configured to generate, based on the decoded write address, primary and redundant memory write addresses and corresponding primary and redundant copies of the write data, if the decoded write address corresponds with a lockstep region of the memory; and a comparator coupled to the lockstep processor, and configured to compare the primary and redundant copies of the write data, and to compare the primary and redundant memory write addresses.

Memory dispatcher

A device for accessing memory configured to store an image data cube, wherein the memory has memory banks, and each memory bank has memory rows and memory columns. The device includes an input configured to receive a memory access request having a logical start address, which specifies a logical bank, a logical row, and a logical column, and a burst size; and a memory address generator configured to generate physical memory addresses based on the logical start address and the burst size, wherein any consecutive logical start addresses mapped to different memory rows are mapped to different memory banks.

Growing community of inventors

Munich, Germany

Muhammad Hassan