Samsung Electronics Co., Ltd.

Mueng-Ryul Lee

Sang-Bae Yi

Soo-cheol Lee

Hwa-Sook Shin

Sun-hak Lee

Joung-Ho Kim

Yong-Chan Kim

Yong-Don Kim

Kwang-dong Yoo

Mi-Hyun Kang

Eung-Kyu Lee

Nam-Young Lee

Sang-bae Yi

Jong-Wook Lim

A semiconductor device includes a semiconductor substrate including isolation regions defining first and second active regions having a first and second conductivity type, respectively, first threshold voltage control regions in predetermined regions of the first active region, wherein the first threshold voltage control regions have the first conductivity type and a different impurity concentration from the first active region, a first gate trench extending across the first active region, wherein portions of side bottom portions of the first gate trench adjacent to the respective isolation region are disposed at a higher level than a central bottom portion of the first gate trench, and the first threshold voltage control regions remain in the first active region under the side bottom portions of the first gate trench adjacent to the respective isolation region, and a first gate pattern. Methods of manufacturing such semiconductor devices are also provided.

Semiconductor devices including threshold voltage control regions

Methods of fabricating semiconductor devices and semiconductor devices including threshold voltage control regions

A semiconductor device is provided. The semiconductor device includes a gate on a substrate, a source region at a first side of the gate, a first conductive type body region under the source region, a second conductive type drain region at a second side of the gate, a device isolation region in the substrate between the source region and the drain region and overlapping part of the gate, and a first buried layer extending in a direction from the source region to the drain region, the first buried layer under the body region, overlapping part of the device isolation region, and not overlapping the drain region.

Lateral double diffused MOS device and method for manufacturing the same

A semiconductor device includes an output port that has a first lateral double diffused metal oxide semiconductor (LDMOS) device and an electrostatic discharge protection device that has a second LDMOS device and a bipolar transistor and that protects the output port from electrostatic discharge. A breakdown voltage of the second LDMOS device is equal to or lower than a breakdown voltage of the first LDMOS device.

Semiconductor device

A semiconductor device comprises a substrate and a gate which extends on the substrate in a first horizontal direction. A source region is positioned at a first side of the gate and extends in the first direction. A body region of a first conductivity type is under the source region and extends in the first direction. A drain region of a second conductivity type is at a second side of the gate and extends in the first direction. A drift region of the second conductivity type extends between the body region and the drain region in the substrate in a second horizontal direction. A first buried layer is under the drift region in the substrate, the first buried layer extending in the first and second directions. A plurality of second buried layers is between the first buried layer and the drift region in the substrate. The second buried layers extend in the second direction and are spaced apart from each other in the first direction.

A semiconductor transistor device includes a drift region, an insulating structure, a gate insulator, a gate electrode, a source, and a drain. The drift region includes a first lateral portion having a first dopant concentration and a second lateral portion having a second dopant concentration that is higher than the first lateral portion. The insulating structure is formed on the drift region and is disposed over a border between the first and second lateral portions such that hole generation is minimized in the drift region during operation.

Semiconductor transistor device and method of manufacturing the same

A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.

Semiconductor integrated circuit devices

In a HV transistor having a high breakdown voltage and a method of manufacturing the same, a first insulation pattern is formed on a semiconductor substrate by oxidizing a portion of the substrate, and a second insulation pattern is formed such that at least a portion of the first insulation pattern is covered with the second insulation pattern. A gate electrode including a first end portion and a second end portion opposite to the first end portion is formed on the substrate by depositing conductive materials onto the substrate. The first end portion is formed on the first insulation pattern and the second end portion is formed on the second insulation pattern. Source/drain regions are formed at surface portions of the substrate by implanting impurities onto the substrate. Electric field intensity at an edge portion of the gate electrode is reduced, and the HV transistor has a high breakdown voltage.

High voltage transistor and methods of manufacturing the same

A method of fabricating a semiconductor device including gate dielectrics having different thicknesses may be provided. A method of fabricating a semiconductor device may include providing a substrate having a higher voltage device region and a lower voltage device region, forming an anti-oxidation layer on the substrate, and selectively removing portions of the anti-oxidation layer on the substrate. The method may also include performing a first thermal oxidization on the substrate to form a field oxide layer on the selectively removed portions of the anti-oxidation layer, removing the anti-oxidation layer disposed on the higher voltage device region, performing a second thermal oxidization on the substrate to form a central higher voltage gate oxide layer on the higher voltage device region, removing the anti-oxidation layer disposed on the lower voltage device region, and performing a third thermal oxidization on the substrate to form a lower voltage gate oxide layer on the lower voltage device region.

Growing community of inventors

Seoul, South Korea

Mueng-Ryul Lee