Invensense, Inc.

Analog Devices,inc.

Netlogic Microsystems, Inc

Mozafar Maghsoudnia

Peter Smeys

Brian H Kim

Haijun She

Sandeep Khanna

Peter George Hartwell

Jia Gao

A method includes aligning a germanium feature on a first CMOS wafer with an aluminum feature on a second CMOS wafer. The aluminum feature and the germanium feature are pressed together. A eutectic bond is formed connecting the aluminum feature to the germanium feature. The eutectic bond has a melting point which is lower than the melting point of aluminum and the melting point of germanium.

3D integration using Al&#x2014;Ge eutectic bond interconnect

A Micro Electro Mechanical systems (MEMS) device includes a solder bump on a substrate, a CMOS-MEMS die comprising a CMOS die and a MEMS die, and stud bumps on the CMOS die. The MEMS die is disposed between the CMOS die and the substrate. The stud bumps and the solder bumps are positioned to provide an electrical connection between the CMOS die and the substrate.

Assembly and packaging of MEMS device

Integrated microelectromechanical systems (MEMS) acoustic sensor devices are disclosed. Integrated MEMS acoustic sensor devices can comprise a MEMS acoustic sensor element and a pressure sensor within the back cavity associated with the MEMS acoustic sensor element. Integrated MEMS acoustic sensor devices can comprise a port adapted to receive acoustic waves or pressure. Methods of fabrication are also disclosed.

Integrated package containing MEMS acoustic sensor and pressure sensor

Provided herein is an apparatus including a first CMOS wafer and a second CMOS wafer. A number of eutectic bonds connect the first CMOS wafer to the second CMOS wafer. The eutectic bond includes combinations where the eutectic bonding temperature is lower than the maximum temperature a CMOS circuit can withstand without being damaged during processing.

A method and system for providing a MEMS sensor integrated with a flip chip are disclosed. In a first aspect, the system comprises a MEMS sensor, at least one flip chip coupled to the MEMS sensor, and at least one through-silicon via (TSV) that electrically connects the at least one flip chip to the MEMS sensor. In a second aspect, the system comprises a MEMS sensor that includes a CMOS coupled to a MEMS structure, wherein the CMOS comprises a substrate coupled to an interconnect in contact with the MEMS structure. The system further comprises a plurality of flip chips coupled to the substrate, a plurality of TSV that electrically connect the plurality of flip chips to the interconnect, and a plurality of layers on the substrate to provide electrical connections between the plurality of flip chips and from the plurality of flip chips to at least one external component.

MEMS sensor integrated with a flip chip

An integrated circuit device for delivering power to a load includes a composite transistor and a composite schottky diode. The composite transistor is formed by a plurality of component transistors that have commonly coupled source terminals, commonly coupled drain terminals and commonly coupled gate terminals. The composite schottky diode is formed by a plurality of component schottky diodes that have anodes coupled in common and coupled to the source terminals of the plurality of component transistors, and for which drain terminals of the commonly coupled drain terminals constitute respective cathodes.

Transistor with spatially integrated schottky diode

A method for stabilizing thin film structures fabricated on an I.C. wafer requires the performance of a rapid thermal annealing (RTA) step after the thin film material, preferably silicon-chromium (SiCr) or silicon chromium carbide (SiCrC), is sputtered onto the wafer. The RTA step stabilizes the TF and thereby increases the film's integrity. With the TF structures stabilized, the effect of subsequent high temperature process steps on the film is reduced. The stabilization method enables TF resistors thereby formed to attain a higher degree of accuracy, and thus to improve the ability with which resistors can be matched. Resistor TCR and sheet rho consistency are also improved, both within a given wafer and from wafer to wafer.

I.C. thin film resistor stabilization method

A novel I.C. processing scheme for the fabrication of thin film features eliminates the wet etching step previously required, reducing the chip's minimum metal spacing and improving component matching capabilities and reliability. A thin film material is deposited and patterned, prior to a contact mask or platinum sputter/sinter/strip step, followed by the deposition of a protective layer. Contact mask and silicide metallization steps create contacts to the substrate, and a second contact mask step creates openings to the thin film features. The protective layer covering the thin film material allows a dry etch to be used for the final metal etch step, eliminating the need for a wet etch step and its attendant problems. The process requires no new design rules, and is easily adapted to existing products.

Growing community of inventors

San Jose, CA, United States of America

Mozafar Maghsoudnia