Kabushiki Kaisha Toshiba

Motoya Kishida

Ichiro Mizushima

Takashi Nakao

Tsukasa Nakai

Hiroyuki Fukumizu

Yasuhiro Nojiri

Takeo Furuhata

Akiko Sekihara

Tsubasa Harada

Yasuhiro Satoh

Mitsuru Sato

Takashi Suzuki

Kazuhiko Yamamoto

Tsuyoshi Shibata

Kenichi Murooka

Yukie Nishikawa

Yasuhiko Sato

Akiko Nomachi

Kazuyuki Yahiro

Seiji Nakagawa

Masanobu Baba

Yoshio Kasai

Masanori Komura

Shuichi Taniguchi

Shuichi Kuboi

Jun Idebuchi

Miki Kawase

A semiconductor device according to an embodiment includes a semiconductor layer, a first insulating film provided on the semiconductor layer, a first conductive layer provided on the first insulating film, a second insulating film provided on the semiconductor layer and the first conductive layer, a second conductive layer provided on the second insulating film, a first contact portion connecting the semiconductor layer and the second conductive layer, and a second contact portion connecting the first conductive layer and the second conductive layer. A distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the second contact portion is greater than a distance between the semiconductor layer and an upper portion of the second insulating film adjacent to the first contact portion. The second contact portion has a larger width than the first contact portion.

Semiconductor device

This nonvolatile semiconductor memory device comprises a memory cell array including memory cells arranged therein. Each of the memory cells is located at respective intersections between first wirings and second wirings and includes a variable resistance element. The variable resistance element comprises a thin film including carbon (C). The thin film includes a side surface along a direction of a current flowing in the memory cell. The side surface includes carbon nitride (CN).

Nonvolatile semiconductor memory device

According to one embodiment, a non-volatile semiconductor memory device includes: a first line; a second line intersecting with the first line; and a memory cell arranged at a position where the second line intersects with the first line, wherein, the memory cell includes: a variable resistance element; and a negative resistance element connected in series to the variable resistance element.

Non-volatile semiconductor memory device including a variable resistance element

According to one embodiment, a variable resistance layer includes a mixture of a first compound and a second compound. The first compound includes carbon (C) as well as at least one element selected from a group of elements G. The group of elements Gconsists of hydrogen (H), boron (B), nitrogen (N), silicon (Si), and titanium (Ti). The second compound includes at least one compound selected from a group of compounds G. The group of compounds Gconsists of silicon oxide (SiO), silicon oxynitride (SiON), silicon nitride (SiN), carbon nitride (CN), boron nitride (BN), aluminum nitride (AlN), aluminum oxide (AlO), and silicon carbide (SiC). Concentration of the first compound in the variable resistance layer is not less than 30 volume percent, and not more than 70 volume percent.

Nonvolatile semiconductor memory device including a variable resistance layer including carbon

A memory cell comprises a variable resistance film; a first conductive film having one surface contacted with one surface of the variable resistance film; and a second conductive film having one surface contacted with another surface of the variable resistance film. A width of the first conductive film or the second conductive film in a direction orthogonal to a direction that a current flows in the first conductive film or the second conductive film is smaller than a width of the variable resistance film in a direction orthogonal to a direction that a current flows in the variable resistance film. The width of the first conductive film and the second conductive film is smaller than a width of the first line and the second line in a direction orthogonal to a direction that a current flows in the first line and the second line.

Semiconductor memory device, method of manufacturing the same, and method of screening the same

A method of manufacturing a semiconductor device comprises preparing a working film to be processed, forming an adhesion improving region on the working film for increasing an adhesion between the working film and a mask material containing carbon, forming the mask material on the working film, forming a resist pattern on the mask material, the mask material having a higher etching resistance for the working film than the resist pattern, transferring the pattern of the resist pattern onto the mask material, and etching the working film by using the mask material as a mask.

Method of manufacturing semiconductor device

A semiconductor device comprises a semiconductor substrate; a trench formed in the semiconductor substrate or in a layer deposited on the semiconductor substrate; a first conductive layer deposited in the trench and having a recess in the top surface thereof; a buried layer which buries the recess of the first conductive layer and which is made of a material having a melting point lower than that of the first conductive layer; and a second conductive layer formed on the buried layer inside the trench and electrically connected to the first conductive layer.

Semiconductor device and its manufacturing method

A method of manufacturing a semiconductor device, which comprises forming a first semiconductor film on a surface of a semiconductor substrate, adsorbing a first impurity on a surface of the first semiconductor film, adsorbing a second impurity on the surface of the first semiconductor film, forming a second semiconductor film on the surface of the first semiconductor film, and solid-phase-diffusing the first impurity and the second impurity into a region of the semiconductor substrate which is located adjacent to the first and second semiconductor films to thereby form a first diffusion region containing the first impurity and a second diffusion region containing the second impurity, a concentration of the first impurity in the first diffusion region being higher than that of the second impurity in the second diffusion region, and the first diffusion region having the bottom thereof covered by the second diffusion region.

Growing community of inventors

Yokohama, Japan

Motoya Kishida