Nec Electronics Corporation

Nec Corporation

Square Enix Co., Ltd.

Motoko Tanaka

Shinichi Kawai

Kiyokazu Ishige

Akira Yoshino

Teiichiro Nishizaka

Tomohiro Hamajima

Isami Sakai

Input devices having different key structures are provided so as to selectively connect with a game apparatus. The game apparatus has means for discriminating a kind of the connected input device and storing its result, a memory for storing a key navigation table that sets keys to be operated with respect to action message delivered from a server, corresponding to kinds of the input devices, message display means for displaying the action message delivered from the server, and display means for displaying the key to be operated by the player corresponding to the discriminated input device as a guide icon by referring to the key navigation table when the action message is delivered.

Game apparatus having input navigation function and online game program

A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film. The first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines. The second diffusion region is connected to a program and erase bit line.

Semiconductor memory device and control method and manufacturing method thereof

A nonvolatile semiconductor memory device, wherein a poly-silicon film is formed on the entire surface of a memory cell region and a peripheral circuit region, and the poly-silicon film on an element isolating insulation film between the gate insulation films of the memory cell region is selectively removed to form a floating gate base layer. Subsequently, an ONO film is formed on the entire surface, and the poly-silicon film and the ONO film is removed from the peripheral circuit region. A conductive film is then formed on the entire surface, a control gate and a floating gate patterned, and a gate electrode then patterned, although at this point, the ONO film and the poly-silicon film are removed from a boundary region, and when the gate electrode is formed, the element isolating insulation film is carved out and a groove is formed in the region where the conductive film is removed by etching.

Nonvolatile semiconductor memory device and method of manufacturing the same

A semiconductor integrated circuit device selectively decreasing the parasitic capacitance between wiring lines of a wiring layer is provided. This device is comprised of a semiconductor substructure with a main surface, an insulating layer formed on the main surface of the substructure, a first patterned conductive layer formed on the insulating layer to serve as a first-level wiring layer, and an interlevel dielectric layer formed on the insulating layer to cover the first-level wiring layer. The first-level wiring layer includes a first plurality of wiring lines and a second plurality of wiring lines. The first plurality of wiring lines are located apart from each other at gaps equal to or smaller than a specific value. The second plurality of wiring lines are located apart from each other at gaps larger than the specific value. The interlevel dielectric layer includes voids selectively located in the gaps of the first plurality of wiring lines, thereby decreasing a parasitic capacitance between the first plurality of wiring lines. The tops of the voids are lower than the tops of the first-level wiring layer, respectively.

Growing community of inventors

Tokyo, Japan

Motoko Tanaka