Intel Corporation

Marvellworld Trade Ltd.

Moti Altahan

Sharon Levy

David Ben-Eli

Rony Ashkenazi

Gil Katzir

Meir Griniasty

In an embodiment, a method includes performing a redundancy check to determine if a baseline bit sequence is compliant. When the baseline bit sequence is not compliant, the method additionally includes performing an iterative process until a compliant, candidate bit sequence is identified. The iterative process includes identifying one or more existing branches within a conceptual tree diagram, calculating scores for potential paths branching from the one or more existing branches, and performing a subsequent redundancy check on a next candidate bit sequence, which corresponds to a potential path that has a next lowest score, to determine if the next candidate bit sequence is compliant.

Block decoding methods and apparatus

A method of apparatus to free at least a portion of memory space of a memory device from at least a portion of a stored data block, wherein the freeing is based on the block sequence number of the stored data block and/or a quality indicator value related to at least a portion of the stored data block. Other embodiments may be described and claimed.

Method and apparatus for freeing memory

Briefly, a wireless communication device, a wireless communication system and a method of controlling a transmission power level of a dedicated channel signal transmitted in a compress mode with an alternate scrambling code. The method includes transmitting one or more power control commands to a base station to control a transmission power of one or more frames scrambled by primary scrambling codes and prior of receiving a dedicated channel signal scrambled by alternate scrambling codes, transmitting one or more pre-alternate scrambling codes power control commands.

Method and apparatus of power control

A method and apparatus to free at least a portion of memory space of a memory device from at least a portion of a stored data block, wherein the freeing is based on the block sequence number of the stored data block and a quality indicator value related to at least a portion of the stored data block. The apparatus may include a receiver to receive at least the portion of the data block transmitted according to an error correction scheme.

Growing community of inventors

Tel Aviv, Israel

Moti Altahan