Intel Corporation

Mostafa A Aghazadeh

Hong Xie

Amar A Ghori

James R Neal

Gregory Turturio

Chia-pin Chiu

Willy Agatstein

Chia-Pin Chiu

James Christopher Matayabas, Jr

Shankar Devasenathipathy

Kevin J Haley

John F McMahon

Kyle Jordan Arrington

Joseph B Petrini

Mark J Palmer

Gregory Turturro

Jerrod Peterson

Aaron McCann

Frank Kolman

James V Noval

Ricardo E Suarez

Darul J Nelson

To address technical problems facing silicon transient thermal management, a thermal interface material (TIM) may be used to provide improved thermal conduction. The TIM may include a liquid metal (LM) TIM, which may provide a significant reduction in thermal resistance, such as a thermal resistance R&#x2248;0.01-0.025&#xb0; C.-cm2/W. The LM TIM may be applied using a presoaked applicator, such as an open-cell polyurethane foam applicator that has been presoaked in a controlled amount of LM TIM. This LM presoaked applicator is then used to apply the LM TIM to one or more target thermal surfaces, thereby providing thermal and mechanical coupling between the LM TIM and the thermal surface. The resulting thermal surface and thermally conductive LM TIM may be used to improve thermal conduction for various silicon-based devices, including various high-power, high-performance system-on-chip (SoC) packages, such as may be used in portable consumer products.

Liquid metal thermal interface material application

The processor card assembly of the present invention includes a processor card, a metallic plate and a back cover. The processor card includes a circuit board having a processor mounted thereto. The circuit board includes a first and a second plurality of fastening features. The metallic plate has a third and a fourth plurality of fastening features. The third plurality of fastening features cooperate with the first plurality of fastening features for physically attaching and thermally coupling the processor to the metallic plate, to serve as a base for further thermally coupling the processor to a heat sink. The back cover has a fifth plurality of fastening features that cooperate with the second plurality of fastening features of the circuit board and the fourth plurality of fastening features of the metallic plate to allow the metallic plate and the back cover to physically and electro-magnetically form a Faraday cage enclosing the processor card to shield off electro-magnetic interference emissions and electrostatic discharge from the processor.

Processor card assembly including a heat sink attachment plate and an

An integrated circuit package that has no internal routing or vias within the substrate of the package. The package includes a substrate that has a plurality of bond pads and connecting contact pads located on an outer first surface of the substrate. An integrated circuit is mounted to the first surface and coupled to the bond pads. Mounted to the substrate is a solder rack which contains a plurality of contacts that couple the contact pads to an external printed circuit board.

Integrated circuit solder-rack interconnect module

A heat transfer apparatus providing thermal coupling between a first and a second hinged member. The first hinged member is a first computer housing member, and the second hinged member is a second computer housing member. The first and the second computer housing members are rotatably attached allowing pivotal motion along an axis substantially parallel to the first edge. A first embodiment has a spiraled heat transfer element with a inner edge thermally coupled to a heat conductive mounting element mounted along the first edge of the first computer housing member. The spiraled heat transfer element forms at least one turn around the heat conductive mounting element and has outer edge affixed to the second computer housing member. A second embodiment provides heat transfer between the first and second computer housing members through the gudgeon and the pintle of the hinge.

Apparatus for dissipating heat in a hinged computing device

A very large scale integrated (VLSI) chip designed to operate at 3.3 volts is modified to be compatible with prior systems having a 5 volt voltage supply. A central processing unit (CPU) is fabricated at a center position on an integrated circuit chip that has an operating voltage of 3.3 volts. The chip is soldered into a pin grid array (PGA) package and a heat sink is attached on the PGA package above the CPU. A 5 volt-to-3.3 volt voltage regulator having a 5 volt input and a 3.3 volt output is placed at an edge of the PGA package. The 3.3 volt output of the voltage regulator is connected to the 3.3 volt operating voltage input of the chip. The VCC 5 V on board pins are connected to the 5 volt input of the voltage regulator and the 3.3 volt output of the voltage regulator is connected to the VCC pins of the chip. VSS ground on board pins are connected in common to both the ground terminal of the voltage regulator and the VSS pads of the chip. High performance capacitors are used to improve the transient response of the on-package voltage regulator. Dual voltage operation of the voltage regulated package is achieved by making the output of the voltage regulator available at the pins of the pin grid array (PGA) package.

Apparatus for optimizing operating parameters of an integrated circuit

A very large scale integrated (VLSI) chip designed to operate at 3.3 volts is modified to be compatible with prior systems having a 5 volt voltage supply. A central processing unit (CPU) is fabricated at a center position on an integrated circuit chip that has an operating voltage of 3.3 volts. The chip is soldered into a pin grid array (PGA) package and a heat sink is attached on the PGA package above the CPU. A 5 volt- to- 3.3 volt voltage regulator having a 5 volt input and a 3.3 volt output is placed at an edge of the PGA package. The 3.3 volt output of the voltage regulator is connected to the 3.3 volt operating voltage input of the chip. The VCC 5V on board pins are connected to the 5 volt input of the voltage regulator and the 3.3 volt output of the voltage regulator is connected to the VCC pins of the chip. VSS ground on board pins are connected in common to both the ground terminal of the voltage regulator and the VSS pads of the chip, High performance capacitors are used to improve the transient response of the on-package voltage regulator. Dual voltage operation of the voltage regulated package is achieved by making the output of the voltage regulator available at the pins of the pin grid array (PGA) package.

Method of optimizing operating parameters of an integrated circuit

An improved heat dissipation device particularly suited for removing heat from a surface mounted integrated circuit component coupled to a printed circuit board in a portable computer. Vias, which are at least partially filled with a heat conductive material, improve heat transfer between a component and a heat conductive block mounted on opposite surfaces of the circuit board. A first section near one end of the heat pipe is attached to the heat conductive block in a channel formed receptive to the heat pipe. A second section of the heat pipe including the second end is attached to a metal plate which is affixed beneath the keyboard. Heat from the component flows through the vias to the block and is transferred by the heat pipe to the metal plate where it is dissipated.

Dissipation of heat through keyboard using a heat pipe

A converging design multi-chip module having semiconductor chips connected to a substrate recessed into a cavity of the MCM package body, the chips being interconnected using flip chip and control collapse chip connection, wherein a metal heatspreader plate is adapted to engage the backside of the chips and is held in place by an attachment ring welded to the package body. Alternatively, the heatspreader plate can be glued directly to the backside of the chips using a high thermal conductivity and low modulus cement. One or more electrically passive thermal shunt chips are disposed between the substrate and the heatspreader plate for additional heat conduction. In a preferred embodiment, the attachment ring is made from KOVAR.RTM. and has a thermal coefficient of expansion that is about the same as that of the package body. Thermal grease is interposed between the heatspreader plate and the semiconductor chips for improved heat transfer. In an alternative embodiment, the heatspreader plate is directly shunted to the substrate. In another alternative embodiment, the heatspreader plate is urged against the chips by a spring plate or a coiled spring against a lid for the package cavity.

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Chandler, AZ, United States of America

Mostafa A Aghazadeh