Intel Corporation

Lucent Technologies Inc.

Moshe Y Vardi

Gila Kamhi

Doron A Peled

Mihalis Yannakakis

Ranan Fraer

Amitai Irron

Marcelo Glusman

Osnat Weissberg

Sela Mador-Haim

Briefly, a system and a method of formal verification and failure analysis and rectification of models or designs, e.g., VLSI designs, of processors, circuits and logical systems. Embodiments of the system may include a multi-value annotation scheme for annotating different types of values of signals, and a post-annotation scheme for further analysis based on the annotated values. Some embodiments of the invention may optionally include a generator of counter-examples of a given length.

System and method to analyze VLSI designs

A system and method for direct black box system verification is provided. For any property, a sequence of inputs for the black box is determined that will verify that the system exhibits the property. Counterexamples of the property are detected without inferring the black box's internal structure; that is, the verification proceeds without identifying all states and state transitions of the black box. A specification automaton operable to exhibit undesirable system behavior is constructed and it is then determined whether an accepting execution exists on the intersection of the black box and the specification automaton. To determine whether such an execution exists, the black box is configured such that it can be reset to its initial state upon command and such that the system indicates when an input is disabled from a current state. When an input is enabled, the implementation transitions to the next state. If an input is disabled, then there is no intersection on the input string. The inputs are determined through a search of a specification automaton for accepting sequences up to a given bound. The bound is the product of the number of states of the black box and the specification automaton.

Directly verifying a black box system

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Bellaire, TX, United States of America

Moshe Y Vardi