California Institute of Technology

Samsung Electronics Co., Ltd.

The Texas A&M University System

Moshe Schwartz

Jehoshua Bruck

Anxiao Jiang

Jun Jin Kong

Hong Rak Son

Jung Soo Chung

Vasken Bohossian

Robert Mateescu

Yuval Cassuto

A method of operating a memory controller is provided. The method includes determining a data state based on an input stream including multiple alphabet letters, converting a part of the input stream, which corresponds to a conversion size, into alphabet letters in a lower numeral system when the data state is determined to be a first state among multiple predetermined data states, inserting one of the converted alphabet letters into the input stream, and outputting each of the alphabet letters in the input stream as is when the data state is determined to be a second state among the predetermined data states.

Memory controller and method of operating the same

Error correction is tailored for the use of an ECC for correcting asymmetric errors with low magnitude in a data device, with minimal modifications to the conventional data device architecture. The technique permits error correction and data recovery to be performed with reduced-size error correcting code alphabets. For particular cases, the technique can reduce the problem of constructing codes for correcting limited magnitude asymmetric errors to the problem of constructing codes for symmetric errors over small alphabets. Also described are speed up techniques for reaching target data levels more quickly, using more aggressive memory programming operations.

Codes for limited magnitude asymmetric errors in flash memories

We investigate a novel storage technology, Rank Modulation, for flash memories. In this scheme, a set of n cells stores information in the permutation induced by the different charge levels of the individual cells. The resulting scheme eliminates the need for discrete cell levels, and overshoot errors when programming cells (a serious problem that reduces the writing speed), as well as mitigate the problem of asymmetric errors. We present schemes for Gray codes, rewriting and joint coding in the rank modulation paradigm.

Rank modulation for flash memories

We investigate error-correcting codes for a novel storage technology, which we call the rank-modulation scheme. In this scheme, a set of n cells stores information in the permutation induced by the different levels of the individual cells. The resulting scheme eliminates the need for discrete cell levels, and overshoot errors when programming cells (a serious problem that reduces the writing speed), as well as mitigates the problem of asymmetric errors. In this discussion, the properties of error correction in rank modulation codes are studied. We show that the adjacency graph of permutations is a subgraph of a multi-dimensional array of a special size, a property that enables code designs based on Lee-metric codes and L-metric codes. We present a one-error-correcting code whose size is at least half of the optimal size. We also present additional error-correcting codes and some related bounds.

Error correcting codes for rank modulation

A coding scheme for data is presented in which data is encoded and decoded such that a sequence of unconstrained input binary symbols, such as 1's and 0's, is encoded into a representation according to an alphabet comprising allowable time intervals between adjacent input binary symbols according to a precision parameter p, a minimum resolution parameter &#x3b1;, and resolution restriction functions L(t) and R(t), thereby defining a precision-resolution (PR) constrained code, and is modulated into an output signal comprising a waveform having signal peaks corresponding to the representation and separated according to the PR-constrained code for transmission of the output signal over the data channel. In this discussion, the minimum resolution parameter is denoted as a and is not limited to integer values.

Growing community of inventors

Rehovot, Israel

Moshe Schwartz