Alpha Omega Semiconductor Inc.

Moses Ho

Anup Bhalla

John Chen

Hamza Yilmaz

Lingpeng Guan

Wilson Ma

Daniel Ng

Yeeheng Lee

Xiaobin Wang

Tiesheng Li

Madhur Bobde

Hong Chang

Sung-Shan Tai

Lingping Guan

Mike F Chang

Limin Weng

Il Kwan Lee

This invention discloses a semiconductor power device disposed in a semiconductor substrate and the semiconductor substrate has a plurality of trenches. Each of the trenches is filled with a plurality of epitaxial layers of alternating conductivity types constituting nano tubes functioning as conducting channels stacked as layers extending along a sidewall direction with a 'Gap Filler' layer filling a merging-gap between the nano tubes disposed substantially at a center of each of the trenches. The 'Gap Filler' layer can be very lightly doped Silicon or grown and deposited dielectric layer. In an exemplary embodiment, the plurality of trenches are separated by pillar columns each having a width approximately half to one-third of a width of the trenches.

Nano-tube MOSFET technology and devices

This invention discloses a method for manufacturing a semiconductor power device on a semiconductor substrate supporting a drift region composed of an epitaxial layer. The method includes a first step of growing a first epitaxial layer followed by forming a first hard mask layer on top of the epitaxial layer; a second step of applying a first implant mask to open a plurality of implant windows and applying a second implant mask for blocking some of the implant windows to implant a plurality of dopant regions of alternating conductivity types adjacent to each other in the first epitaxial layer; and a third step of repeating the first step and the second step by applying the same first and second implant masks to form a plurality of epitaxial layers, each of which is implanted with the dopant regions of the alternating conductivity types. Then the manufacturing processes proceed by carrying out a device manufacturing process on a top side of the epitaxial layer on top of the dopant regions of the alternating conductivity types with a diffusion process to merge the dopant regions of the alternating conductivity types as doped columns in the epitaxial layers.

Manufacturing methods for accurately aligned and self-balanced superjunction devices

This invention discloses a semiconductor power device that includes an active cell area having a plurality of power transistor cells. Each of said power transistor cells has a planar Schottky diode that includes a Schottky junction barrier metal covering areas above gaps between separated body regions between two adjacent power transistor cells. The separated body regions further provide a function of adjusting a leakage current of said Schottky diode in each of said power transistor cells. Each of the planar Schottky diodes further includes a Shannon implant region disposed in a gap between the separated body regions of two adjacent power transistor cells for further adjusting a leakage current of said Schottky diode. Each of the power transistor cells further includes heavy body doped regions in the separated body regions next to source regions surrounding said Schottky diode forming a junction barrier Schottky (JBS) pocket region.

Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout

Self-aligned charge balanced semiconductor devices and methods for forming such devices are disclosed. One or more planar gates are formed over a semiconductor substrate of a first conductivity type. One or more deep trenches are etched in the semiconductor self-aligned to the planar gates. The trenches are filled with a semiconductor material of a second conductivity type such that the deep trenches are charge balanced with the adjacent regions of the semiconductor substrate Source and body regions are formed by implanting dopants onto the filled trenches. This process can form self-aligned charge balanced devices with a cell pitch less than 12 microns.

Method of forming a self-aligned charge balanced power DMOS

A method for manufacturing a semiconductor power device on a semiconductor substrate supporting a drift region composed of an epitaxial layer by growing a first epitaxial layer followed by forming a first hard mask layer on top of the epitaxial layer; applying a first implant mask to open a plurality of implant windows and applying a second implant mask for blocking some of the implant windows to implant a plurality of dopant regions of alternating conductivity types adjacent to each other in the first epitaxial layer; repeating the first step and the second step by applying the same first and second implant masks to form a plurality of epitaxial layers then carrying out a device manufacturing process on a top side of the epitaxial layer with a diffusion process to merge the dopant regions of the alternating conductivity types as doped columns in the epitaxial layers.

Self-aligned charge balanced semiconductor devices and methods for forming such devices are disclosed. One or more planar gates are formed over a semiconductor substrate of a first conductivity type. One or more deep trenches are etched in the semiconductor self-aligned to the planar gates. The trenches are filled with a semiconductor material of a second conductivity type such that the deep trenches are charge balanced with the adjacent regions of the semiconductor substrate This process can form self-aligned charge balanced devices with a cell pitch less than 12 microns.

A method of fabricating a semiconductor device comprises forming a hard mask on a substrate having a top substrate surface, forming a trench in the substrate, through the hard mask, depositing gate material in the trench, where the amount of gate material deposited in the trench extends beyond the top substrate surface, and removing the hard mask to leave a gate structure that extends substantially above the top substrate surface.

Shallow source MOSFET

A method is disclosed for making a substantially charge balanced multi-nano shell drift region (MNSDR) for superjunction semiconductor devices atop a base substrate. The MNSDR has numerous concentric nano shell members NSM, NSM, . . . , NSM(M&#x3e;1) of alternating, substantially charge balanced first conductivity type and second conductivity type and with height NSHT. First, a bulk drift layer (BDL) is formed atop the base substrate. A substantially vertical cavity of pre-determined shape and size and with depth NSHT is then created into the top surface of BDL. The shell members NSM, NSM, . . . , NSMare successively formed inside the vertical cavity, initially upon its vertical walls then moving toward its center, so as to successively fill the vertical cavity till a residual space remains therein. A semi-insulating or insulating fill-up nano plate is then formed inside the residual space to fill it up.

Growing community of inventors

Campbell, CA, United States of America

Moses Ho