Bell Telephone Laboratories

At&t Bell Laboratories

American Telephone & Telegraph Co., At&t Bell Laboratories

American Telephone and Telegraph, Co.

Morton B Panish

Henryk Temkin

Lloyd R Harriott

Alfred Yi Cho

Young-Kai Chen

Roger J Malik

Robert Alan Hamm

Anthony F Levi

George Arthur Rozgonyi

Horace C Casey, Jr

Richard N Nottenburg

Yuh-Lin Wang

John F Walker

Glenn D Kubiak

Improved heterojunction bipolar transistor (HBT) are disclosed. Inventive devices can attain high cut-off frequency (f.sub.T), exemplarily 80 GHz or higher, and high DC current gain (.beta.), exemplarily 25 or higher. The devices exhibit lateral scaling, permitting reduction in emitter stripe width without unacceptable decrease in .beta.. Exemplarily the stripe width is 1 .mu.m or less. The inventive HBTs are hot electron devices, with the hot electrons in the base region being spatially confined such that relatively few electrons reach the surface of the extrinsic base region. The relatively low bulk and surface recombination rate in the base of inventive HBTs is an important aspect of the invention and makes possible devices having relatively high .beta. and low power consumption. Appropriate choice of base material, namely, a semiconductor material having relatively low intrinsic surface recombination velocity, can result in further reduction of surface recombination, as can, for instance, the use of an appropriate non-alloyed metal base contact. Appropriate choice of collector material can result in improved ballistic transport through the collector depletion region, and novel selection criteria are disclosed. InP, InAs, and In.sub.0.53 Ga.sub.0.47 As are exemplary materials that meet these criteria. Use of a highly doped collector contact region, with dopant level within a relatively narrow concentration range, can also lead to improved device behavior, as can the use of a compound emitter that comprises one or more appropriately placed thin undoped heteroepitaxial layers.

Heterostructure bipolar transistor

Fine featured devices are produced by a series of fabrication steps including exposing selective surface regions to irradiation, e.g. to an ion beam, generally to result in removal of masking material within irradiated regions. In most instances, subsequent etching is under conditions such that bared material is preferentially removed. Etch-removal and irradiation are such that overgrown material is of device quality at least in etched regions. The inventive process is of particular value in the fabrication of integrated circuits, e.g. circuits performing electronic and/or optical functions. The inventive process is expediently used in the fabrication of structures having minimum feature size of 1 micrometer and smaller. Patterning is dependent upon masking material of a maximum thickness of 100 .ANG..

Device fabrication

36 We have discovered the III-V semiconductor layers with previously unattainably high effective hole concentrations can be produced by molecular growth processes (e.g. MBE) if an amphoteric dopant such as Be is used and if, during the growth of the highly doped III-V layer, the substrate is maintained at a temperature T.sub.g that is substantially lower than customarily used. For instance, a InGaAs layer with effective hole concentration 1.0.times.10.sup.20 cm.sup.-3 was grown at T.sub.g =450.degree. C., and a GaAs layer with effective hole concentration of 1.0.times.10.sup.20 cm.sup.-3 was grown at T.sub.g of 475.degree. C. The heavily doped III-V layers can be of device grade and can usefully be part of electronic devices such as high speed bipolar transistors.

Method of growing III-V semiconductor layers with high effective hole

When high-vacuum methods are used in the manufacture of miniaturized devices such as, e.g., semiconductor integrated-circuit devices, device layers on a substrate are preferably patterned without breaking of the vacuum. Preferred patterning involves deposition of a semiconductor mask layer, generation of the pattern in the mask layer by ion deflected-beam writing, and transfer of the pattern by dry etching. When the mask layer is an epitaxial layer, further epitaxial layer deposition after patterning may proceed without removal of remaining mask layer material.

Patterning method in the manufacture of miniaturized devices

The invention is a method and apparatus for growing group III-V semiconductor layers by molecular beam deposition in which a gaseous source is used to form a molecular beam comprising M.sub.2 or M.sub.4 molecules, where M is a group V element. Arsine and phosphine may be decomposed in a high temperature leak-source to provide As.sub.2 and P.sub.2 molecular beams for molecular beam epitaxy of group III-V semiconductors such as GaAs and InP.

Molecular beam deposition technique using gaseous sources of group V

A semiconductor double heterostructure (DH) laser or spontaneous emitting diode is described which emits radiation in the infrared region of the spectrum from about 3.5 to 5.5 micrometers. The DH structure comprises a Group III-V lattice-matched system, in particular, Al.sub.y Ga.sub.1-y Sb--InAs.sub.x Sb.sub.1-x where 0.ltoreq.y.gtoreq.1 and 0.82.ltoreq..times..ltoreq.0.91, approximately.

Light emitting diodes which emit in the infrared

In the fabrication of double heterostructure GaAsAlGaAs junction lasers by molecular beam epitaxy, it has been found that suitably annealing the entire heterostructure increases the external quantum efficiency of the laser and reduces the room temperature threshold for lasing. Also described is a technique using relatively uncollimated beams to deposit continuously on the interior walls of the vacuum chamber fresh layers which getter deleterious contaminants. In addition, pyrolytic boron nitride, rather than graphite, effusion cells are utilized in order to reduce the amount of CO formation in the system.

MBE growth: gettering contaminants and fabricating heterostructure

The average stress between contiguous layers of Al.sub.x Ga.sub.1.sub.-x As and Al.sub.y Ga.sub.1.sub.-y As (y &gt; x) is reduced by the addition of phosphorus during the growth of the latter layer to produce the quaternary Al.sub.y Ga.sub.1.sub.-y As.sub.1.sub.-z P.sub.z instead of the ternary Al.sub.y Ga.sub.1.sub.-y As. In order to reduce the average stress to less than about 2 .times. 10.sup.8 dynes/cm.sup.2 the amount of phosphorus added should satisfy the condition: ##EQU1## Also described is a double heterostructure junction laser comprising a GaAs or AlGaAs active layer sandwiched between layers of AlGaAsP.

Growing community of inventors

Springfield, NJ, United States of America

Morton B Panish