Standard Microsystems Corporation

Morton B Herman

John F Tweedy, Jr

James D Sproch

In a local area network, a plurality of nodes are connected to a single port of a hub through a length of cable and a corresponding plurality of transceivers attached to the cable, each of the transceivers having an output impedance significantly greater than the cable characteristic impedance, thereby allowing a plurality of nodes to be connected to one hub port with a single cable.

Local area network with multiple node bus topology

A video dot intensity balancer for use in a video display system wherein information is represented by a series of logic bits in a video stream corresponding to dots to be displayed on a CRT is disclosed. Logic elements are coupled to the output of a bit generator for comparing adjacent bits and outputting an information-defining signal wherein a single information-defining bit never stands alone. In this manner, apparent intensity imbalances on the video screen are eliminated.

Video dot intensity balancer

For a microcomputer system including a program memory and a microprocessor having means for executing sets of microinstructions which includes an instruction decoder and a microinstruction memory for storing the sets of microinstructions wherein each set of microinstructions is associated with a publicly known OP code, and wherein each set being activated in response to a related control word there is disclosed a method for securing from unauthorized copying a program stored in the program memory consisting of instruction words, with each instruction word including a control word wherein each of the instruction words is stored in a program memory external to the microprocessor. The method includes the steps of defining a set of proprietary control words wherein each proprietary control word is associated with a distinct publicly known OP code and its set of microinstructions of recording the program to be protected in the program memory with each instruction word including the proprietary control word associated with a desired set of microinstructions, and of fabricating the instruction decoder means and the microinstruction memory of the microprocessor so that each received proprietary control word is converted to the address of the microinstruction memory which stores the first microinstruction of the set of microinstructions associated with such received proprietary control word.

Software security method using partial fabrication of proprietary

A microprocessor based CRT video display system includes a microprocessor, a memory and a video processor and controller. The video processor and controller incorporates data and address bus structure in which a plurality of programmable registers are connected to both the data bus and the address bus. The programmable registers arranged along the data and address buses permit efficient retrieval of information from memory for display and also permit the video display system to provide a number of advantageous system features.

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Huntington, NY, United States of America

Morton B Herman