Genusion, Inc.

Mitsubishi Denki Kabushiki Kaisha

Moriyoshi Nakashima

Natsuo Ajika

Masaaki Mihara

Shoji Shukuri

Kazuo Kobayashi

Jun Shibata

Kazunari Michii

Kojiro Yuzuriha

Hideki Ishii

Jun Sumino

Hiromi Makimoto

Makoto Ooi

A hot electron (BBHE) is generated close to a drain by tunneling between bands, and it data writing is performed by injecting the hot electron into a charge storage layer. When Vg is a gate voltage, Vsub is a cell well voltage, Vs is a source voltage and Vd is a drain voltage, a relation of Vg&#x3e;Vsub&#x3e;Vs&#x3e;Vd is satisfied, Vg&#x2212;Vd is a value of a potential difference required for generating a tunnel current between the bands or higher, and Vsub&#x2212;Vd is substantially equivalent to a barrier potential of the tunnel insulating film or higher.

Nonvolatile semiconductor memory

A semiconductor device can be manufactured with a high non-defect ratio, making it possible to easily guarantee the KGD (Known-Good-Die) of semiconductor chips, when configuring one packaged semiconductor device on which a plurality of semiconductor chips is mounted. Utilizing each semiconductor chip is made possible without limits on terminal position, pitch, signal arrangement, and so on. Protrusions provided to a semiconductor chip mounted sealing sub-board are attached to a package substrate. A plurality of semiconductor bare chips is disposed in a space formed between the semiconductor chip mounted sealing sub-board and the package substrate, making wiring possible.

Interposer, semiconductor chip mounted sub-board, and semiconductor package

A semiconductor chip mounted interposer () is configured by executing wire bonding between a semiconductor chip () and an interposer (), in which terminals () that connect to terminals () of the chip () and separate terminals () are formed, on the upper face of the interposer (). A semiconductor chip () is mounted to the top face of a package substrate (), the interposer () is adhered to the upper portion of the chip (), and wire bonding is executed between the terminals () and terminals ('). When configuring a semiconductor device with a plurality of semiconductor chips combined into one package in this manner, KGD (Known-Good-Die) can easily be guaranteed for each semiconductor chip, and semiconductor devices can be fabricated with a high yield of good units. Also, the semiconductor chips can be used as-is, without restricting the position, pitch, signal arrangement, or the like, of their terminals.

Semiconductor device package structure

A hot electron (BBHE) is generated close to a drain by tunneling between bands, and bit data writing is performed by injecting the hot electron into a charge storage layer. When Vg is a gate voltage, Vsub is a cell well voltage, Vs is a source voltage and Vd is a drain voltage, a relation of Vg&#x3e;Vsub&#x3e;Vs&#x3e;Vd is satisfied, Vg&#x2212;Vd is a value of a potential difference required for generating a tunnel current between the bands or higher, and Vsub&#x2212;Vd is substantially equivalent to a barrier potential of the tunnel insulating film or higher.

Nonvolatile semiconductor storage device and method for writing therein

A semiconductor device includes a first semiconductor package and a second semiconductor package which is mounted onto the first semiconductor package. The first semiconductor package has lands on an upper surface for mounting the second semiconductor package and lands on the lower surface for external connection, which are used for connection with a mounting substrate. The second semiconductor package has external leads which are connected to the lands for mounting the second semiconductor package.

Semiconductor device

A field oxide film which is fine and having smaller upheaval of a bird's head is formed, so as to improve electrical characteristic of a conductive layer formed with end portions positioned on the field oxide film. A planarizing silicon film is formed on a silicon nitride film and a thermal oxide film, so as to planarize a concave generated between the thermal oxide film and a silicon nitride film. The planarizing silicon film is thermally oxidized, so as to form a planarizing thermal oxide film integrated with the thermal oxide film. Thereafter, the planarizing thermal oxide film is etched back to form the field oxide film, and the silicon nitride film and a polycrystalline silicon film are removed. Thereafter, the conductive layer with end portions positioned on the field oxide film is formed.

Method of manufacturing semiconductor device

The semiconductor device includes a silicon substrate, a conductor thin film formed over the surface of the silicon substrate with a first insulating film interposed therebetween, a second insulating film covering the upper surface of the conductor thin film, and an interconnection layer formed on the second insulating film. A contact hole is formed in the second insulating film and the conductor thin film and the interconnection layer are electrically connected to each other through the contact hole. An insulator layer or a conductor layer in an electrically floating state is selectively formed between the conductor thin film and the surface of the silicon substrate at least immediately below the contact hole. The semiconductor device is formed, for example, by selectively forming a conductor layer on the first insulating film, covering the exposed surface thereof with an insulating film, and then depositing the conductor thin film. In accordance with the semiconductor device and the manufacturing method thereof, even if the conductor thin film is penetrated by an anisotropic etching at the time of forming the contact hole, insulation between the silicon substrate and the conductor thin film is ensured without fail, and a highly reliable semiconductor device can be provided with high productivity, having no defect due to dielectric breakdown.

Growing community of inventors

Hyogo, Japan

Moriyoshi Nakashima