Infineon Technologies Ag

Qimonda Ag

Moritz Haupt

Martin Schrems

Anke Krasemann

Dietmar Ottenw&auml;lder

Matthias Goldbach

Erhard Landgraf

Stephan Wege

Sven Schmidbauer

Tobias Mono

Michael Stadtmueller

Jens-Uwe Sachse

Hans-Peter Sperlich

Alexandra Lamprecht

Uwe Paul Schr&ouml;der

Anja Morgenschweis

Andreas Klipp

Sabine Steck

Gustav Beckmann

Momtchill Stavrev

Daniel K&ouml;hler

The present invention relates to a transistor comprising a gate channel area and a gate stack having mechanical stress arranged on the gate channel area.

Method for manufacturing an integrated circuit including a transistor

The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (); providing and patterning a silicon nitride layer () on the semiconductor substrate () as topmost layer of a trench etching mask; forming a trench () in a first etching step by means of the trench etching mask; conformally depositing a liner layer () made of silicon oxide above the resulting structure, which leaves a gap (SP) reaching into the depth in the trench (); carrying out a V plasma etching step for forming a V profile of the line layer () in the trench (); wherein the liner layer () is pulled back to below the top side of the silicon nitride layer (); an etching gas mixture comprises CF, Oand an inert gas is used in the V plasma etching step; the ratio (V) of CF/Olies between 2.5 and 3.5; and the selectivity of the V plasma etching step between silicon oxide and silicon nitride is at least 10.

Fabrication method for a semiconductor structure

The present invention provides methods of producing substantially void-free trench structures. After deposition of an a-Si or polysilicon layer in a trench formed in a semiconductor, the a-Si or polysilicon is exposed to hydrogen at an elevated temperature.

Void free, silicon filled trenches in semiconductors

A trench capacitor is formed with an insulation collar. After the formation of the trench, firstly an insulating layer is deposited, from which layer the insulation collar will be subsequently formed. Afterward, the trench is partly filled with a sacrificial filling material and a thin patterning layer is deposited thereon. Spacers are formed from that layer and cover the insulating layer in the upper region of the trench. Afterward, the sacrificial filling material and the insulating layer are completely removed in the lower region of the trench. As a result, the insulation collar is produced in the upper region of the trench.

Method for fabricating an insulation collar in a trench capacitor

A method for improving a doping profile using gas phase doping is described. In the method, silicon nitride and/or products of decomposition from a silicon nitride deposition are introduced in a process chamber before or during the actual gas phase doping. This allows the doping profile to be significantly improved.

Method for improving a doping profile for gas phase doping

A method for manufacturing a trench capacitor uses a low-pressure gas phase doping for forming a buried plate as a capacitor plate. The use of the low-pressure gas phase doping reduces process costs and improves capacitor properties.

Method for manufacturing a trench capacitor

Growing community of inventors

Dresden, Germany

Moritz Haupt