Mitsubishi Electric Corporation

Mitsubishi Denki Kabushiki Kaisha

Renesas Electronics Corporation

Morishige Hieda

Tadashi Takagi

Kenichi Tajima

Kenichi Miyaguchi

Moriyasu Miyazaki

Masatake Hangai

Kazutomi Mori

Hiroyuki Mizutani

Ryoji Hayashi

Hiroyuki Joba

Michiaki Kasahara

Akira Inoue

Yoshihito Hirano

Nobuhiko Ando

Yoshinori Takahashi

Tomohiro Akiyama

Kiyohide Sakai

Mitsuhiro Shimozawa

Yukihisa Yoshida

Kenichi Horiguchi

Kazuyoshi Inami

Tamotsu Nishino

Hideyuki Nakamizo

Norio Takeuchi

Hiroshi Ikematsu

Kazuhide Higuchi

Hiromasa Nakaguro

Mikio Hatamoto

Tatsuo Kohama

Koji Yamanaka

Takuya Suzuki

Hiroshi Otsuka

Masaomi Tsuru

Koji Tsutsumi

Yukihiro Tahara

Kenji Kawakami

Yutaro Yamaguchi

Hideki Morishige

Hifumi Noto

Naohisa Takayama

Kazuhiro Nishida

Kenji Mukai

Satoshi Miho

Norihiro Yunoue

Hideki Hatakeyama

Naoko Nitta

As a layout requirement imposed on an in-phase corporate-feed circuit, there is provided only a layout requirement to equalize the electric length of a transmission line () between one of N T-branch units () which is m-th when counted from a start point of a path A, and another one of the T-branch units () which is (m+1)-th when counted from the start point of the path A, to that of a transmission line () between one of N T-branch units () which is m-th when counted from an end point of a path B, and another one of the T-branch units () which is (m+1)-th when counted from the end point of the path B. Therefore, the in-phase corporate-feed circuit can be formed in a space smaller than that in which its circuit configuration of tournament type is formed, and downsizing of the circuit size can be achieved.

In-phase corporate-feed circuit and array antenna apparatus

A signal generating circuit includes a control voltage setting unit (CVSU) configured to set a control voltage for a chirp signal using voltage-frequency characteristics indicating characteristics of an output frequency versus voltage; a VCO configured to alter the frequency of its output signal by the control voltage; a quadrature demodulator configured to perform quadrature demodulation of the output signal of the VCO to generate an inphase signal and a quadrature signal orthogonal to each other; and a frequency detector configured to detect the frequency of the output signal of the VCO on the basis of the inphase signal and quadrature signal. The CVSU corrects the control voltage by using the voltage-frequency characteristics derived from relationships between the control voltage and the frequency of the output signal of the VCO. The VCO generates the chirp signal based on the control voltage corrected by the CVSU.

Signal generating circuit

Synthesizers () for synthesizing feedback signals output from a plurality of antenna modules () are provided. A distortion compensation signal output unit () derives, from a difference between a feedback signal synthesized by the synthesizers () and a base band signal output from a modulation unit (), a distortion compensation coefficient that provides, to the base band signal, distortion characteristics opposite to distortion characteristics of a signal radiated from the phased array antenna and outputs a predistortion signal representing the distortion compensation coefficient to a PD unit ().

Phased array antenna device

A problem with conventional distortion pulse shift circuits is that the output timing of a pulse signal cannot be controlled unless a reset signal is used. A pulse shift circuit according to the present invention includes: an integrator to integrate, for every clock, the first signal to be inputted; a quantizer to receive the second signal and to output a pulse signal when an integrated value of the integrator becomes equal to or larger than a signal value of the second signal; a delay circuit to delay the pulse signal; a converter disposed before or after the delay circuit to convert a signal value of the pulse signal into the signal value of the second signal; a subtractor to subtract the signal value of the pulse signal converted by the converter, from the signal value of the first signal to be inputted to the integrator; and an input signal control circuit to receive a third signal, to be disposed before the integrator, and to add a signal value corresponding to the third signal to the first signal to be inputted to the integrator or to block the first signal from being inputted to the integrator for clocks corresponding to the third signal.

Pulse shift circuit and frequency synthesizer

Filter circuitry is constituted by transversal filters which are connected in parallel to each other. The transversal filters change amplitude and a phase of an input digital signal X[n&#xb7;T] and output different digital signals X[n&#xb7;T], X[n&#xb7;T], and X[n&#xb7;T] as respective resulting digital signals whose amplitude and phase have been changed. A phase frequency computer computes a phase &#x3b8;[n&#xb7;T] and a frequency f[n&#xb7;T] of the input digital signal X[n&#xb7;T] by performing phase computation and frequency computation using the digital signals X[n&#xb7;T], X[n&#xb7;T], and X[n&#xb7;T] output by the transversal filters.

Phase frequency detection device

A comparatorthat detects the difference between a high frequency signal detected by a detectorand a feedback signal A output from a comparator; a comparatorthat detects the difference between the difference detected by the comparatorand a feedback signal B output from an adder; and a loop filterthat passes only a prescribed low frequency band of the output signal of the comparatorare provided, in which an amplitude sensitivity adjusteradjusts the amplitude sensitivity of a variable gain amplifierin accordance with the rate of change of the signal passing through the loop filter, thereby controlling the gain of the variable gain amplifier

Analog feedback amplifier

An analog feedback amplifier is capable of suppressing extraneous phase fluctuations and broadening a bandwidth by preventing effects of a group delay element by using an amplitude regulatorand a delay line

An array antenna apparatus in which an SN ratio is improved. Antenna elements having transmission modules, respectively, are arranged in plurality, wherein the plurality of transmission modules respectively have transmission signal generators that each output a transmission intermediate frequency signal, local oscillation signal generators that each output a local oscillation signal, and transmission mixers that each mix the transmission intermediate frequency signal and the local oscillation signal with each other, thereby to carry out frequency conversion to a transmission high frequency signal. A reference signal source inputs a reference signal to the transmission signal generators and the local oscillation signal generators. The transmission intermediate frequency signal and the local oscillation signal are synchronized with each other by the reference signal.

Array antenna apparatus

A transmission module including a power supply voltage control unit that sets a power supply voltage to the high frequency amplifier in a variable manner, and a control circuit that controls an amplitude control unit, a phase control unit and the power supply voltage control unit. The control circuit and the power supply voltage control unit control the power supply voltage in accordance with an output power of the high frequency amplifier. The transmission module can carry out not only phase control but also amplitude control in a continuous manner, while suppressing amplitude and phase variation, and a high frequency amplifier in the transmission module is made highly efficient. In addition, a large directional gain, a low side lobe level and a low power consumption are achieved, as a phased array antenna apparatus using a transmission module.

Transmission module and phased array antenna apparatus

A reception circuit is provided which can detect the beginning of data regardless of a preamble or a unique word contained or not in a received signal and regardless of coding systems for received signals. The reception circuit includes a correlation operation portion that performs a correlation operation to generate a correlation signal while sliding one symbol of reference signal in relation to a received signal. The reference signal goes to a high level during a first half symbol period and goes to a low level during a second half symbol period. The reception circuit further includes: a delay portion that outputs a delay signal by delaying the received signal for a half symbol period in relation to the received signal; and a data beginning timing detection portion that detects a beginning peak timing for the correlation signal as a beginning timing of data contained in the delay signal.

Reception circuit

A multiport amplifier and a wireless device using the same are obtained in which isolation among output terminals is improved, whereby the quality of communication is improved. The multiport amplifier includes an input hybrid, an output hybrid, a plurality of amplifiers and a plurality of gain and phase control circuits that are inserted between the input hybrid and the output hybrid, a plurality of output coupling circuits that are inserted between the output hybrid and a plurality of output terminals so that they receive output extraction signals corresponding to a plurality of output signals, and a feedback circuit including a frequency selection circuit that is inserted between the plurality of output coupling circuits and the plurality of gain and phase control circuits.

Multiport amplifier and wireless device using the same

An output terminalis provided at the connecting pointbetween the collector terminal of a transistorand an open-ended stubby connecting the open-ended stubto the collector terminal of the transistor, the open-ended stubhaving a line length equal to a quarter of the wavelength of a signal of frequency 2N&#xb7;For 2N times the oscillation frequency F. In addition, an output terminalis provided at a connecting pointlocated at a distance equal to a quarter of the wavelength of a signal of oscillation frequency Ffrom the end of an open-ended stubby connecting the open-ended stubto the base terminal of the transistor, the open-ended stubhaving a line length longer than a quarter of the wavelength of the signal of oscillation frequency F.

Oscillator, transmitter-receiver and frequency synthesizer

A single pole single throw switch for controlling propagation of a high frequency signal between an input terminal () and an output terminal (). First FET switches () in which drains and sources of FETs () are connected in parallel with inductors () are connected in parallel. Each FET () is switched between on state and off state by a voltage being applied to the gate thereof. At the frequency of the high frequency signal, each inductor () connected with off capacitor of each FET () resonates in parallel.

SPST switch, SPDT switch and MPMT switch

A phase-shifting circuit includes: a first parallel circuit which is connected across input and output terminals of a high frequency signal, composed of a first inductor and a first switching element that exhibits a through state in an ON state and a capacitive property in an OFF state, and produces parallel resonance at a prescribed frequency when the first switching element is in the OFF state; a series circuit composed of a second inductor and a third inductor and connected in parallel with the first parallel circuit; a capacitor having its first terminal connected to a point of connection of the second and third inductors; and a second parallel circuit which is connected across a second terminal of the capacitor and a ground, composed of a fourth inductor and a second switching element that exhibits a through state in an ON state and a capacitive property in an OFF state, and produces parallel resonance at a prescribed frequency when the second switching element is in the OFF state. The phase-shifting circuit establishes by switching an operation mode of setting the first switching element at the ON state and the second switching element at the OFF state, or an operation mode of setting the first switching element at the OFF state and the second switching element at the ON state.

Phase-shifting circuit and multibit phase shifter

Provided is a small-size phase shift circuit having a broad band characteristic. The phase shift circuit includes: a first switching element for switching between a through path and a capacitance capacity; a second switching element for switching the capacitance capacity for the through path and the ground; and a first and a second inductor having inductance. One end of the first switching element is connected to one end of the second switching element by the first inductor while the other ends of the first and the second switching element are connected to each other by the second inductor. One end of the first switching element is connected to a high-frequency signal input terminal while the other end of the first switching element is connected to a high-frequency signal output terminal. Thus, it is possible to constitute a phase device satisfying a predetermined condition.

Phase shift circuit, high frequency switch, and phase shifter

Growing community of inventors

Tokyo, Japan

Morishige Hieda