Socionext Inc.

Morimi Arita

Tomoyuki Yamada

Tomoya Tsuruta

Shunsuke Harada

A bit line precharging circuit includes a first switch that connects a bit line to a first power source, a second switch that connects the bit line to a second power source whose voltage value is higher than voltage value of the first power source, and a control circuit including a delay element and configured to bring the second switch into conduction after a delay time by the delay element after bringing the first switch into conduction at the time of precharge of the bit line.

Bit line precharging circuit, static RAM, electronic device, and static ram bit line precharging method

Characteristics of each transistor in a semiconductor device including a transistor of a memory cell are measured by an ASV monitoring circuit, a power supply voltage supplied to the semiconductor device is determined based on the measured characteristics of the transistor, a data read-out speed of the memory cell under the determined power supply voltage supplied is measured while changing a signal level of a word line by an SRAM word line monitoring circuit, the signal level of the word line is determined by comparing the measured data read-out speed of the memory cell and a specification range of the memory cell, and the signal level of the word line is appropriately set at the power supply voltage applied by the ASV.

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Yokohama, Japan

Morimi Arita