Digital Equipment Corporation

Morgan E Robinson

Thomas Courtenay Porcher

David B Hughes

The present invention is circuitry which is employed with a data terminal which data terminal in turn is part of a system including a main data processor. The present circuitry includes a microprocessor which is connected to the main data processor and to the keyboard. The microprocessor processes signals from both the main data processor and the keyboard. The system has a plurality of operational function circuits, such as a circuit to effect smooth scrolling on a data display means. There is logic circuitry connected between the microprocessor and the operational function circuits. The logic circuitry provides a first path which permits signals, generated in response to instructions from the main data processor, to pass therethrough to select one of the operational function circuits and simultaneously therewith to turn the selected circuit either on or off. The logic circuitry also provides a second path which permits signals, generated in response to instructions from the keyboard to pass therethrough to select one of the operational function circuits and turn circuit either on or off. A circuit to generate an impeding signal is also included and is activated by signals from the microprocessor in response to signals from the keyboard. This last mentioned generator circuit is connected to impede signals which would otherwise be transmitted along said first path, whereby said keyboard, after selecting a particular operational function circuit, can 'lock in' that circuit so that the main data processor cannot turn that selected circuit off.

Circuit for selecting and locking in operation function circuitry

The present invention is related to clearing a communication path and in the alternative blocking said communication path between a data terminal and a main data processor, when it appears, from said terminal end, that the data path into the main computer is blocked by some system irregularity in a first case, or should be blocked because of a data overflow condition, in a second case. The present system employs a pair of buffers, the first of which is connected in said communication path, while the second buffer is connected in a data path along which data signals are transmitted from the main data processor. Said communication path includes first logic circuitry connected between said first buffer device and a UART which is connected to the main data processor. Said first logic circuitry can block or unblock the transmission of data to the main data processor. Second logic circuitry is connected between the second buffer and said UART. Said second logic circuitry includes monitoring circuitry which monitors signals coming from the main data processor so that if an 'off' signal is transmitted, then a proper signal will be generated and sent to said first logic circuitry to block data transmission from said terminal.

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Hanover, NH, United States of America

Morgan E Robinson