Sony Corporation

Moonjae Jeong

Kiyoshi Makigawa

Daisuke Hirono

Sachio Akebono

Taiki Iguchi

Katsuyuki Tanaka

Toru Terashima

Fumihiro Nishiyama

Fumitaka Kondo

Kazuyuki Saijo

A communication system includes one or more communication apparatuses, each including a transmission circuit and a reception circuit. The transmission circuit includes a transmission unit and a signal generator. The transmission unit transmits one of a first transmission signal including first transmission data or a second transmission signal including at least one of a periodic signal with a constant frequency or a narrow band modulation signal having lower speed than the first transmission data. The signal generator generates the second transmission signal. The reception circuit includes a reception unit that receives the first transmission signal and the second transmission signal a narrow band detector that outputs a narrow band detection signal through detecting the second transmission signal in a narrow band, and a determination unit that determines presence of a significant signal or presence of significant signal change in the narrow band detection signal and outputs a determination signal.

Communication apparatus and communication system

There is provided a power supply switching circuit including a first control signal output unit that outputs a signal exceeding a predetermined potential using a main power supply as a first control signal when a power supply voltage of the main power supply exceeds a predetermined reference voltage, a second control signal output unit that outputs the signal exceeding the predetermined potential using a standby power supply from a battery as a second control signal when a potential of the first control signal does not exceed the predetermined potential, and a power supply output unit that outputs the main power supply when the first control signal exceeds the predetermined potential and outputs the standby power supply when the second control signal exceeds the predetermined potential.

Power supply switching circuit, electronic device, and control method of power supply switching circuit

There is provided a circuit including a capacitor, a current source configured to supply a current to the capacitor, a comparator configured to output a result of comparison between a voltage stored in the capacitor and a predetermined voltage, and a switch section configured to intermittently which is caused to flow to the capacitor by the current source.

Circuit and power supply circuit with output that transitions between capacitor stored voltage and predetermined voltage

There is provided a voltage detector including a reference voltage generator that generates a constant reference voltage when a power supply voltage is higher than a predetermined threshold voltage, and a detector that, when the power supply voltage exceeds a voltage that is higher than the threshold voltage by a predetermined potential, detects whether the power supply voltage is higher than a defined voltage based on the reference voltage and outputs a detection result.

Voltage detector, electronic device, and control method of voltage detector

In a sampling block-, an intermediate frequency signal RIFs is sampled at a frequency of the intermediate frequency signal RIFs multiplied by '1/(m+0.25)' or '1/(m+0.75)' (m: 0 or natural number), to generate signals having phase differences &#x201c;0&#x201d;, &#x201c;&#x3c0;/2&#x201d;, &#x201c;&#x3c0;&#x201d;, and &#x201c;3&#x3c0;/2&#x201d;. A polarity adjustment block-matches a polarity of the signal having phase difference &#x201c;&#x3c0;&#x201d; with that of the signal having phase difference &#x201c;0&#x201d;. Further, it matches a polarity of the signal having phase difference &#x201c;3&#x3c0;/2&#x201d; with that of the signal having phase difference &#x201c;&#x3c0;/2&#x201d;. In a signal synthesis block-, the signal with phase difference &#x201c;0&#x201d; and the signal with phase difference &#x201c;&#x3c0;&#x201d; having phase difference &#x201c;&#x3c0;&#x201d; from each other are synthesized and held to be output as a demodulated signal PI. Further, the signal with phase difference &#x201c;&#x3c0;/2&#x201d; and the signal with phase difference &#x201c;3&#x3c0;/2&#x201d; having phase difference &#x201c;&#x3c0;&#x201d; from each other are synthesized and held to be output as a demodulated signal PQ. It is possible to provide a demodulation circuit and a receiving set that can easily obtain a good demodulated signal by a simple configuration.

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Kanagawa, Japan

Moonjae Jeong