Avago Technologies Wireless IP (Singapore) Pte. Ltd.

Avago Technologies General IP (Singapore) Pte. Ltd.

Other

Moon-Suk Jeon

Jung-Hyun Kim

Young Kwon

Sang Hwa Jung

Jung Hyun Kim

Junghyun Kim

Youngwoo Kwon

Sung-Hwan Park

Jung-Rin Woo

Yong-Bae Choi

Woo-Yeon Hong

Jung-Min Oh

Joo-Min Jung

A radio frequency (RF) power amplifier comprises an output stage amplifying circuit and a counterpart waveform generator. The output stage amplifying circuit receives a first waveform through an input node and amplifies the first waveform so as to output an amplified waveform through an output node. The counterpart waveform generator generates a second waveform corresponding to a portion of frequency components of the first waveform. The output stage amplifying circuit and the counterpart waveform generator are electrically coupled such that the second waveform is applied to the input node of the output stage amplifying circuit to substantially compensate the portion of frequency components of the first waveform.

Power amplifying apparatus and method using same

A power amplifier circuit for amplifying an envelope modulated Radio Frequency (RF) signal with improved linearity and efficiency includes a power amplifier, and a variable load matching circuit coupled to an output port of the power amplifier. The input impedance of the variable load matching circuit is changed such that an output power of the power amplifier is at a first output power level, or a second output power level which is higher than the first output power level.

Pulsed dynamic load modulation power amplifier circuit

A multi-mode power amplifier and an electronic device including the amplifier are described.

Multiple output power mode amplifier

A voltage-insensitive circuit includes a second circuit, and a biasing means for providing a constant bias current to the second circuit, the bias current being insensitive to power fluctuations of the voltage-insensitive circuit.

Voltage supply insensitive bias circuits

Provided is a temperature-compensated bias circuit for a power amplifier, in which a first resistor (Rref) connected to a reference voltage is connected to a base terminal of a third transistor (Q) and an emitter terminal of the third transistor is connected to a first diode (D). The temperature-compensated bias circuit includes a second resistor (R) connected to the reference voltage, a third resistor (R) connected to the second resistor in series, a fourth resistor (Rc) having one terminal connected to the reference voltage, a fifth resistor (Re) having one terminal connected to ground, a bias transistor (Q) having a base terminal connected to a contact point (VS) between the second resistor and the third resistor, a collector terminal connected to the other terminal of the fourth resistor, and an emitter terminal connected to the other terminal of the fifth resistor, and a sixth resistor (Rf) connected between a collector terminal of the third transistor and a collector terminal of the bias transistor.

Temperature-compensated bias circuit for power amplifier

Growing community of inventors

Seoul, South Korea

Moon-Suk Jeon