Samsung Electro-mechanics Co., Ltd.

Moon Hee Yi

Yong Ho Baek

Jung Hyun Cho

Joo Hwan Jung

Tae Seong Kim

Seung Eun Lee

Yul Kyo Chung

Yong Hoon Kim

Jun Sik Hwang

Joo Ho Jung

Byoung Chan Kim

Jun Oh Hwang

Hae Kyo Seo

Kyung Sang Lim

An antenna substrate includes a skin layer containing an insulating material, a ground layer containing a conductive material, an insulating layer disposed between the skin layer and the ground layer and including an insulating material different from the insulating material of the skin layer, a plurality of patch antennas disposed between the ground layer and the skin layer, a shielding member disposed between the ground layer and the skin layer, spaced apart from the plurality of patch antennas, and connected to the ground layer, and a shielding post connected to the shielding member, and protruding further than an outer surface of the skin layer, from the shielding member in a direction facing the skin layer, at least a portion of the shielding post being disposed between the plurality of patch antennas.

Antenna substrate and electronic device including the same

An antenna substrate and an antenna module including the same are provided. The antenna substrate includes an antenna unit including first and second pattern layers adjacent to each other and disposed on different levels and a first insulating layer providing a first insulating region between the first and second pattern layers, and a feed unit including third and fourth pattern layers adjacent to each other and disposed on different levels and a second insulating layer providing a second insulating region between the third and fourth pattern layers. Each of the first and second pattern layers includes an antenna pattern, and each of the third and fourth pattern layers includes a feed pattern. The antenna unit is disposed on the feed unit. The first insulating region is thicker than the second insulating region.

Antenna substrate and antenna module comprising the same

A semiconductor package includes a first substrate, a first electronic component disposed on the first substrate, a second substrate disposed on the first substrate and provided with a cavity disposed in one surface of the second substrate, a first connection member connecting the first and second substrates to each other, a heat dissipation structure disposed on the second substrate and spaced apart from the first connection member, a second connection member disposed on the second substrate, and a via disposed on the second substrate, spaced apart from the heat dissipation structure, and connected to the first connection member. The second substrate includes a first region in which the cavity is disposed and a second region connected to the first substrate, and the heat dissipation structure is disposed in each of the first and second regions of the second substrate.

Semiconductor package including heat dissipation structure

A fan-out semiconductor package includes a semiconductor chip disposed in a through-hole of a first connection member having the through-hole and a second connection member disposed on an active surface of the semiconductor chip. A plurality of dummy vias surrounding the semiconductor chip are disposed in the first connection member.

Fan-out semiconductor package

A fan-out semiconductor package includes: a first connection member having a through-hole and having a passive component disposed in the first connection member; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed therein and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip, and the passive component is electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

Fan-out semiconductor package including electromagnetic interference shielding layer

A fan-out semiconductor package includes a first connection member having a through-hole, a semiconductor chip disposed in the through-hole, at least one component-embedded substrate disposed adjacent the semiconductor chip in the through-hole and spaced apart from the semiconductor chip by a predetermined distance and having a plurality of passive components embedded therein, an encapsulant encapsulating at least portions of the first connection member, the at least one component-embedded substrate, and the semiconductor chip, and a second connection member disposed on the first connection member, the at least one component-embedded substrate, and the semiconductor chip. The first and second connection members each include redistribution layers electrically connected to the connection pads of the semiconductor chip, and the plurality of passive components embedded in the at least one component-embedded substrate are electrically connected to the connection pads of the semiconductor chip through the redistribution layer of the second connection member.

A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a pattern layer disposed on the encapsulant and covering at least portions of the encapsulant adjacent to the inactive surface of the semiconductor chip; vias penetrating through the encapsulant and connecting the pattern layer and the inactive surface of the semiconductor chip to each other; and a second connection member disposed on the first connection member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip.

A fan-out semiconductor package includes: a support member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the support member and the semiconductor chip; and a connection member disposed on the support member and the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads. The support member includes a glass plate and an insulating layer connected to the glass plate.

Growing community of inventors

Suwon-si, South Korea

Moon Hee Yi