Viasystems Technologies Corp. L.l.c.

Ddi Global Corp.

Dynamic Details, Inc.

Monte P Dreyer

Michael Jon Taylor

Raj Kumar

Rajesh Kumar

Ruben Zepeda

Michael J Taylor

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.

Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies

A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.

Methods of manufacturing printed circuit boards with stacked micro vias

Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies are provided. In one embodiment, the invention relates to a method of manufacturing a printed circuit board including providing a core subassembly including at least one metal layer, providing a plurality of one-metal layer carriers after parallel processing each of the plurality of one-metal layer carriers, and attaching at least two of the plurality of one-metal layer carriers with each other and with the core subassembly.

Methods of manufacturing printed circuit boards using parallel processes to interconnect with subassemblies

Methods of manufacturing printed circuit boards

Methods of manufacturing at least a portion of a printed circuit board. The circuit board is formed to include a plurality of sub-assemblies, each of the sub-assemblies including a plurality of circuit layers and having at least one countersink and at least one hole, the countersink having a first diameter and a first depth from a first side of at least one of the sub-assemblies and into the at least one sub-assembly, the hole having a second diameter smaller than the first diameter and a second depth longer than the first depth from the first side of the at least one sub-assembly and into the at least one sub-assembly at the countersink; a metal metalized within the hole and the countersink; a lamination adhesive interposed between one and a corresponding one of the sub-assemblies and having at least one via formed therethrough; and a counter paste filled within the via.

Manufacturing methods of multilayer printed circuit board having stacked via

Methods of manufacturing printed circuit boards having circuit layers laminated with stacked (or staggered) micro via(s). Aspects of embodiments of the present invention are directed to a method of manufacturing a printed circuit board with Z-axis interconnect(s) or micro via(s) that can eliminate a need for plating micro vias and/or eliminate a need for planarizing plated bumps of a surface, that can be fabricated with one or two lamination cycles, and/or that can have carrier-to-carrier (or substrate-to-substrate) attachments with conductive vias, each filled with a conductive material (e.g., with a conductive paste) in the Z-axis. In one embodiment, a printed circuit board having a plurality of circuit layers with at least one z-axis interconnect can be fabricated using a single lamination cycle.

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Rancho Santa Margarita, CA, United States of America

Monte P Dreyer