Infineon Technologies Ag

Momtchill Stavrev

Stephan Wege

Hans-Peter Sperlich

Moritz Haupt

Andreas Klipp

The present invention provides a fabrication method for a semiconductor structure having the steps of providing a semiconductor substrate (); providing and patterning a silicon nitride layer () on the semiconductor substrate () as topmost layer of a trench etching mask; forming a trench () in a first etching step by means of the trench etching mask; conformally depositing a liner layer () made of silicon oxide above the resulting structure, which leaves a gap (SP) reaching into the depth in the trench (); carrying out a V plasma etching step for forming a V profile of the line layer () in the trench (); wherein the liner layer () is pulled back to below the top side of the silicon nitride layer (); an etching gas mixture comprises CF, Oand an inert gas is used in the V plasma etching step; the ratio (V) of CF/Olies between 2.5 and 3.5; and the selectivity of the V plasma etching step between silicon oxide and silicon nitride is at least 10.

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Dresden, Germany

Momtchill Stavrev