Stmicroelectronics International N.v.

Mohit Singh

Ankur Bal

Pratap Narayan Singh

Rakesh Malik

Shiva Sharath Babu Kaleru

A digital filtering method includes receiving a digital signal, and passing the digital signal through a Pth order comb cascade. The method includes beginning pre-computing of intermediate integrator states of a Pth order integrator cascade as a function of the digital signal, prior to receiving output from a last comb of the Pth order comb cascade. The outputs from each comb of the Pth order comb cascade are then applied to the pre-computed intermediate integrator states to thereby produce a filtered version of the digital signal. The Pth order comb cascade may operate at a sampling frequency, and the pre-computing of the intermediate integrator states is performed at the sampling frequency, while the application of the outputs from each comb of the Pth order comb cascade to the pre-computed intermediate integrator states is performed at a multiple of the sampling frequency.

Glitch immune cascaded integrator comb architecture for higher order signal interpolation

A digital-to-analog converter has an output. An analog-to-digital converter senses a voltage at the output of the digital-to-analog converter and generates a digital voltage signal. A source mismatch estimator processes the digital voltage signal to output an error signal indicative of current source mismatch within the digital-to-analog converter. An error code generator generates a digital calibration signal from the error signal. The digital calibration signal is converted by a redundancy digital-to-analog converter to an analog compensation signal for application to the output of analog-to-digital converter to nullify effects of the current source mismatch.

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Delhi, India

Mohit Singh