Kla Tencor Corporation

Mohan Mahadevan

Jason Kirkwood

Scott Allen Young

Lisheng Gao

Lena Nicolaides

Richard Wallingford

Lu Chen

Ajay Gupta

Tao Luo

Sankar Venkataraman

James A Smith

Junqing (Jenny) Huang

Ashok V Kulkarni

Brian Duffy

Kris Bhaskar

Laurent Karsenti

Bradley Ries

Himanshu Vajaria

Alex Salnik

Jing Zhang

Hedong Yang

Paul Horn

Li He

Songnian Rong

Tommaso Torelli

Huajun Ying

Govind Thattaisundaram

Guoheng Zhao

Shifang Li

Stilian Pandev

Bjorn Brauer

Stanley E Stokowski

Kenong Wu

Eliezer Rosengaus

Isabella Talley Lewis

Eugene Shifrin

Santosh Bhattacharyya

Mark J Roulo

Youxian Wen

Amir Azordegan

Chao Fang

Thanh Huy Ha

Chien-Huei (Adam) Chen

Prashant Aji

Chien-Huei Adam Chen

Chris Maher

Aneesh Khullar

Cecelia Anne Campochiaro

Chetana Bhaskar

Wolfgang Vollrath

Shabnam Ghadar

Ben-Ming Benjamin Tsai

Yair Carmon

Amitoz Singh Dandiana

Lalita A Balasubramanian

Timothy Goodwin

Sina Jahanbin

Alpa Kohli

Hung Nien

Saurabh Sharma

Ernesto Escorcia

Michael Gasvoda

Udy Danino

Noga Bullkich

Sashi Balasingam

Prashant A Aji

Paul D Horn

Lalita Balasubramanian

Methods and systems for accelerated training of a machine learning based model for semiconductor applications are provided. One method for training a machine learning based model includes acquiring information for non-nominal instances of specimen(s) on which a process is performed. The machine learning based model is configured for performing simulation(s) for the specimens. The machine learning based model is trained with only information for nominal instances of additional specimen(s). The method also includes re-training the machine learning based model with the information for the non-nominal instances of the specimen(s) thereby performing transfer learning of the information for the non-nominal instances of the specimen(s) to the machine learning based model.

Accelerated training of a machine learning based model for semiconductor applications

Real-time job distribution software architectures for high bandwidth, hybrid processor computation systems for semiconductor inspection and metrology are disclosed. The imaging processing computer architecture can be scalable by changing the number of CPUs and GPUs to meet computing needs. The architecture is defined using a master node and one or more worker nodes to run image processing jobs in parallel for maximum throughput. The master node can receive input image data from a semiconductor wafer or reticle. Jobs based on the input image data are distributed to one of the worker nodes. Each worker node can include at least one CPU and at least one GPU. The image processing job can contain multiple tasks, and each of the tasks can be assigned to one of the CPU or GPU in the worker node using a worker job manager to process the image.

Semiconductor inspection and metrology systems for distributing job among the CPUs or GPUs based on logical image processing boundaries

Methods and systems for generating a high resolution image for a specimen from a low resolution image of the specimen are provided. One system includes one or more computer subsystems configured for acquiring a low resolution image of a specimen. The system also includes one or more components executed by the one or more computer subsystems. The one or more components include a deep convolutional neural network that includes one or more first layers configured for generating a representation of the low resolution image. The deep convolutional neural network also includes one or more second layers configured for generating a high resolution image of the specimen from the representation of the low resolution image. The second layer(s) include a final layer configured to output the high resolution image and configured as a sub-pixel convolutional layer.

Generating high resolution images from low resolution images for semiconductor applications

Methods and systems for aligning images for a specimen acquired with different modalities are provided. One method includes acquiring information for a specimen that includes at least first and second images for the specimen. The first image is acquired with a first modality different than a second modality used to acquire the second image. The method also includes inputting the information into a learning based model. The learning based model is included in one or more components executed by one or more computer systems. The learning based model is configured for transforming one or more of the at least first and second images to thereby render the at least the first and second images into a common space. In addition, the method includes aligning the at least the first and second images using results of the transforming. The method may also include generating an alignment metric using a classifier.

Learning based approach for aligning images acquired with different modalities

Systems and methods for detecting defects on a wafer are provided. One method includes generating output for a wafer by scanning the wafer with an inspection system using first and second optical states of the inspection system. The first and second optical states are defined by different values for at least one optical parameter of the inspection system. The method also includes generating first image data for the wafer using the output generated using the first optical state and second image data for the wafer using the output generated using the second optical state. In addition, the method includes combining the first image data and the second image data corresponding to substantially the same locations on the wafer thereby creating additional image data for the wafer. The method further includes detecting defects on the wafer using the additional image data.

Systems and methods for detecting defects on a wafer

Methods and systems for detecting and classifying defects on a specimen are provided. One system includes one or more components executed by one or more computer subsystems. The one or more components include a neural network configured for detecting defects on a specimen and classifying the defects detected on the specimen. The neural network includes a first portion configured for determining features of images of the specimen generated by an imaging subsystem. The neural network also includes a second portion configured for detecting defects on the specimen based on the determined features of the images and classifying the defects detected on the specimen based on the determined features of the images.

Unified neural network for defect detection and classification

Disclosed are methods and apparatus for detecting defects or reviewing defects in a semiconductor sample. The system has a brightfield (BF) module for directing a BF illumination beam onto a sample and detecting an output beam reflected from the sample in response to the BF illumination beam. The system has a modulated optical reflectance (MOR) module for directing a pump and probe beam to the sample and detecting a MOR output beam from the probe spot in response to the pump beam and the probe beam. The system includes a processor for analyzing the BF output beam from a plurality of BF spots to detect defects on a surface or near the surface of the sample and analyzing the MOR output beam from a plurality of probe spots to detect defects that are below the surface of the sample.

Apparatus and methods for combined brightfield, darkfield, and photothermal inspection

Methods and systems for detecting defects in patterns formed on a specimen are provided. One system includes one or more components executed by one or more computer subsystems, and the component(s) include first and second learning based models. The first learning based model generates simulated contours for the patterns based on a design for the specimen, and the simulated contours are expected contours of a defect free version of the patterns in images of the specimen generated by an imaging subsystem. The second learning based model is configured for generating actual contours for the patterns in at least one acquired image of the patterns formed on the specimen. The computer subsystem(s) are configured for comparing the actual contours to the simulated contours and detecting defects in the patterns formed on the specimen based on results of the comparing.

Contour based defect detection

Methods and systems for performing one or more functions for a specimen using output simulated for the specimen are provided. One system includes one or more computer subsystems configured for acquiring output generated for a specimen by one or more detectors included in a tool configured to perform a process on the specimen. The system also includes one or more components executed by the one or more computer subsystems. The one or more components include a learning based model configured for performing one or more first functions using the acquired output as input to thereby generate simulated output for the specimen. The one or more computer subsystems are also configured for performing one or more second functions for the specimen using the simulated output.

Accelerating semiconductor-related computations using learning based models

Methods and systems for monitoring process tool conditions are disclosed. The method combines single wafer, multiple wafers within a single lot and multiple lot information together statistically as input to a custom classification engine that can consume single or multiple scan, channel, wafer and lot to determine process tool status.

Wafer and lot based hierarchical method combining customized metrics with a global classification methodology to monitor process tool condition at extremely high throughput

Shadow-grams are used for edge inspection and metrology of a stacked wafer. The system includes a light source that directs collimated light at an edge of the stacked wafer, a detector opposite the light source, and a controller connected to the detector. The stacked wafer can rotate with respect to the light source. The controller analyzes a shadow-gram image of the edge of the stacked wafer. Measurements of a silhouette of the stacked wafer in the shadow-gram image are compared to predetermined measurements. Multiple shadow-gram images at different points along the edge of the stacked wafer can be aggregated and analyzed.

Automated inline inspection and metrology using shadow-gram images

Disclosed are methods and apparatus for inspecting and processing semiconductor wafers. The system includes an edge detection system for receiving each wafer that is to undergo a photolithography process. The edge detection system comprises an illumination channel for directing one or more illumination beams towards a side, top, and bottom edge portion that are within a border region of the wafer. The edge detection system also includes a collection module for collecting and sensing output radiation that is scattered or reflected from the edge portion of the wafer and an analyzer module for locating defects in the edge portion and determining whether each wafer is within specification based on the sensed output radiation for such wafer. The photolithography system is configured for receiving from the edge detection system each wafer that has been found to be within specification. The edge detection system is coupled in-line with the photolithography system.

In-line wafer edge inspection, wafer pre-alignment, and wafer cleaning

Photoreflectance spectroscopy is used to measure strain at or near the edge of a wafer in a production process. The strain measurement is used to anticipate defects and make prospective corrections in later stages of the production process. Strain measurements are used to associate various production steps with defects to enhance later production processes.

Automated inline inspection of wafer edge strain profiles using rapid photoreflectance spectroscopy

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Livermore, CA, United States of America

Mohan Mahadevan