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Analog Bits Inc.

Amirkabir University of Technology

Mohammad Mahdi Ahmadi

Alan C Rogers

A circuit for charge-balanced current-controlled stimulation. The circuit includes a transistor differential pair, a first current mirror, a second current mirror, and a third current mirror. The transistor differential pair includes a first differential input node, a second differential input node, a first differential output node, a second differential output node, and a common node. The transistor differential pair is configured to generate a first differential current that passes through the first differential output node and a second differential current that passes through the second differential output node. The first current mirror is configured to generate a first mirrored current based on the first differential current. The second current mirror is configured to generate a second mirrored current based on the second differential current. The third current mirror is configured to generate a third mirrored current based on the first mirrored current.

Charge-balanced current-controlled stimulation

Implementations provide a receiver circuit that includes: an alternate current (AC)-coupling network to filter an input signal, the AC-coupling network including a first RC filter connected between a first input node and a first common node and a second RC filter connected between a second input node and the first common node; a differential amplifier coupled to the AC-coupling network and configured to receive a filtered input signal from the AC-coupling network and generate an output signal, the differential amplifier including a differential pair of transistors and a common-mode measurement network coupled to source terminals of a first and a second transistors in the differential pair; and a first operational amplifier having an input coupled to output terminal of the common-mode measurement network and an output coupled to the first common node.

Common-mode control for AC-coupled receivers

Some implementations provide a passive equalizer section configured to filter an input signal, the passive equalizer section including: a first passive filter that comprises: a first resistor characterized by a first resistance, and a first reactive component characterized by a first reactance, wherein the first resistor and the first reactive component are in series and connected at a first connection node; and a second passive filter that comprises: a second resistor characterized by a second resistance, and a second reactive component characterized by a second reactance, wherein the second resistor and the second reactive component are in series and connected at a second connection node; and a signal mixing section comprising a plurality of transistors to mix signals with different frequency response characteristics.

Passive linear equalizer for serial wireline receivers

A class-E power oscillator (PO) is disclosed. The class-E PO includes a first inductor, a switch, a first capacitor, a resonant circuit, and a feedback network. The first inductor is coupled in series to a first power supply. The switch is connected between the first inductor and a primary common node. The first capacitor is connected between the first inductor and the primary common node. The resonant circuit includes a second inductor, a second capacitor, and a resistor. The second inductor is connected between the first inductor and the primary common node. The second capacitor is connected between the first inductor and the primary common node, and is coupled in series to the second inductor. The resistor is connected between the first inductor and the primary common node, and is coupled in series to the second inductor. The feedback network is connected between the switch and a feedback node. The feedback node is located between the second inductor and the second capacitor. The feedback network is configured to periodically turn the switch on and off based on a resonance frequency of the resonant circuit.

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Tehran, Iran

Mohammad Mahdi Ahmadi