Intel Corporation

Mohammad Enamul Kabir

Johanna M Swan

Adel A Elsherbini

Aleksandar Aleksov

Shawna M Liff

Feras Eid

Kimin Jun

Han Wui Then

Gerald S Pasdast

Keith Zawadzki

Babita Dhayal

Debendra Mallik

Zhiguo Qian

Krishna Bharath

Doug B Ingerly

Kevin P O'brien

Conor P Puls

Avyaya Jayanthinarasimham

Hannes Greve

Han Li

Mukund Bapna

Sairam Agraharam

Christopher M Pelto

Arnab Sarkar

Shakul Tandon

Gwang-Soo Kim

John Kevin Taylor

Stacked die assemblies having a moisture sealant layer according to embodiments are described herein. A microelectronic package structure having a first die with a second and an adjacent third die on the first die. Each of the second and third die comprise hybrid bonding interfaces with the first die. A first layer is on a region of the first die adjacent sidewalls of the second and the third dies, and adjacent an edge portion of the first die. The first layer comprises a diffusion barrier material A second layer is over the first layer, the second layer, wherein a top surface of the second layer is substantially coplanar with the top surfaces of the second and third dies. The first layer provides a hermetic moisture sealant layer for stacked die package structures.

Moisture seal coating of hybrid bonded stacked die package assembly

Embodiments described herein may be related to apparatuses, processes, and techniques for a barrier that surrounds one or more dies which are electrically coupled with one or more electrical connections on a wafer. The barrier may be a hermetic barrier that is formed on a wafer prior to singulation to prevent moisture intrusion from a side of the wafer that may compromise the one or more electrical connections. Other embodiments may be described and/or claimed.

Hermetic barrier surrounding a plurality of dies

Moisture hermetic guard ring structures for semiconductor devices, related systems, and methods of fabrication are disclosed. Such devices systems, and methods include a guard ring structure laterally surrounding semiconductor devices of a device layer and metal interconnects of an interconnect layer, the guard ring structure extending through the interconnect layer, the device layer, and a bonding layer adjacent one of the interconnect layer or the device layer the bonding layer, and contacting a support substrate coupled to the bonding layer. Such devices systems, and methods may further include via structures having the same material system as the guard ring structure and also extending through the interconnect, the device, and bonding layers and contacting a support substrate.

Moisture hermetic guard ring for semiconductor on insulator devices

A microelectronic package structure with inorganic fill material having a first die with a second and an adjacent third die on the first die. Each of the second and third die comprise hybrid bonding interfaces with the first die. A first layer is on a region of the first die between the second and third dies. A second layer is over the first layer, the second layer comprising an inorganic dielectric material, wherein a top surface of the second layer is substantially coplanar with top surfaces of the second and third dies.

Inorganic fill material for stacked die assembly

Disclosed herein are capacitors and resistors at direct bonding interfaces in microelectronic assemblies, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component, wherein a direct bonding interface of the second microelectronic component is direct bonded to a direct bonding interface of the first microelectronic component, the microelectronic assembly includes a sensor, the sensor includes a first sensor plate and a second sensor plate, the first sensor plate is at the direct bonding interface of the first microelectronic component, and the second sensor plate is at the direct bonding interface of the second microelectronic component.

Capacitors and resistors at direct bonding interfaces in microelectronic assemblies

Disclosed herein are microelectronic assemblies including direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first subregion and a second subregion, and the first subregion has a greater metal density than the second subregion. In some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes a first metal contact and a second metal contact, the first metal contact has a larger area than the second metal contact, and the first metal contact is electrically coupled to a power/ground plane of the first microelectronic component.

Direct bonding in microelectronic assemblies

Disclosed herein are microelectronic assemblies including microelectronic components coupled by direct bonding, and related structures and techniques. In some embodiments, a microelectronic assembly may include a first microelectronic component including a first guard ring extending through at least a portion of a thickness of and along a perimeter; a second microelectronic component including a second guard ring extending through at least a portion of a thickness of and along a perimeter, where the first and second microelectronic components are coupled by direct bonding; and a seal ring formed by coupling the first guard ring to the second guard ring. In some embodiments, a microelectronic assembly may include a microelectronic component coupled to an interposer that includes a first liner material at a first surface; a second liner material at an opposing second surface; and a perimeter wall through the interposer and connected to the first and second liner materials.

Hermetic sealing structures in microelectronic assemblies having direct bonding

Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.

Microelectronic assemblies with inductors in direct bonding regions

Growing community of inventors

Portland, OR, United States of America

Mohammad Enamul Kabir