University of Illinois

Mohammad Alian

Nam Sung Kim

A computing device includes a host processor to execute a host driver to create a host-side interface, the host-side interface emulating a first Ethernet interface, assign the host-side interface a first medium access control (MAC) address and a first Internet Protocol (IP) address. Memory components are disposed on a substrate. A memory channel network (MCN) processor is disposed on the substrate and coupled between the memory components and the host processor. The MCN processor is to execute an MCN driver to create a MCN-side interface, the MCN-side interface emulating a second Ethernet interface. The MCN processor is to assign the MCN-side interface a second MAC address and a second IP address, which identify the MCN processor as a MCN network node to the host processor.

Application-transparent near-memory processing architecture with memory channel network

A system includes a printed circuit board (PCB) on which is disposed memory components and a processor disposed on the PCB and coupled between the memory components and a host memory controller. The processor comprises a memory channel network (MCN) memory controller to handle memory requests associated with the memory components; a local buffer; and a core coupled to the MCN memory controller and the local buffer. The core executes an operating system (OS) running a network software layer and a distributed computing framework; and an MCN driver to: receive a network packet from the network software layer; store the network packet in the local buffer; and assert a transmit polling field of the local buffer to signal to the host memory controller that the network packet is available for transmission to a host computing device.

A server system including an enhanced Network Interface Controller (NIC) within a client-server architecture is provided. The server system includes a memory for storing data from one or more network packets and one or more processors for processing network requests based on the one or more network packets. The enhanced NIC is configured to receive the one or more network packets and transfer the data from the one or more network packets to the memory. During a latency period defined from the time required to transfer the network packet to memory, the enhanced NIC performs a Network-driven, packet Context Aware Power (NCAP) management process in order to actively transition a power management state of the one or more processors to a predicted level. In this manner, computational and energy efficiency of the server system is improved.

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Urbana, IL, United States of America

Mohammad Alian