Sun Microsystems, Inc.

Mohamed Soufi

William K Lam

Victor A Chang

David S Allison

Ping-Chih Wu

Nasser Nouri

Deepankar Bairagi

A method for providing verification for a simulation design, including obtaining the simulation design comprising a programming language interface system call, encoding a target of the programming language interface system call into the simulation design to obtain a first modified simulation design, modifying the programming language interface system call to reference the target in the first modified simulation design to obtain a second modified simulation design, and verifying the second modified simulation design using a simulation testbench.

PLI-less co-simulation of ISS-based verification systems in hardware simulators

A method for providing verification for a first simulation image involves removing nodes from the first simulation image to produce an optimized image and an optimized nodes image, simulating the optimized image, invoking the optimized nodes image if debugging is selected, reconstructing a second simulation image using the optimized image and the optimized nodes image, simulating the second simulation image to gather simulation data, and debugging the first simulation image using simulation data.

Method for simulation with optimized kernels and debugging with unoptimized kernels

A method for transforming a behavioral specification involves converting the behavioral specification into a diagram representation, converting a delay from the diagram representation if the behavioral specification comprises a delay, generating a compliant cycle diagram from the diagram representation, and deriving a cycle equivalent behavioral specification from the compliant cycle diagram.

Method for transforming behavioral architectural and verification specifications into cycle-based compliant specifications

A system for tracing signals for a cycle-based simulation includes a traced signal and a system resources availability information of the cycle-based simulation, a runtime compiler configured to use the system resources availability information to assign a system resource to trace the traced signal, a logic design used with the system resources availability information to generate a simulation image, a first value of the traced signal generated by execution of a simulation image, and a traced signal buffer configured to store the first value and upload the first value.

System and method for efficiently tracing simulation data in hardware acceleration simulation systems

A method for providing verification for a simulation design involves analyzing a simulation design using a testbench comprising a rapid bug detection tool, and if a bug is detected, adding a bug isolation tool to the testbench, and isolating and eliminating the bug using the testbench comprising the bug isolation tool.

Method and apparatus for detection and isolation during large scale circuit verification

A method for dynamically customizing object code for simulation includes obtaining a statically generated object (SGO) and a first test vector, segmenting the SGO with a marker node to generate a segmented SGO comprising a plurality of SGO segments, generating a first simulation profile using the segmented SGO and the first test vector, locating a first unexercised segment of the plurality of SGO segments using the first simulation profile, and generating a first reduced SGO by removing the first unexercised segment from the segmented SGO.

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Santa Clara, CA, United States of America

Mohamed Soufi