Intel Corporation

Mohamed Arafa

Raj K Ramanujan

Scott E Thompson

Woojong Han

Scott Chiu

John K Grooms

Jun Zhu

James K Pickett

Brian S Morris

Bruce Querbach

Dong Wang

Shamanna M Datta

Mani Prakash

Asher M Altman

Edward L Payton

Jordan A Horwich

Techniques for tamper detection of a memory module having non-volatile memory devices resident on a printed circuit board (PCB) by circuitry of a controller also resident on the PCB. Examples include determining resistance values of a character pattern sprayed on a side of a cover facing the non-volatile memory devices using conductive ink following first and second boots of the memory module and asserting a bit of a register to indicate tampering of the memory modules based on a comparison of the resistance values. Tamper policy actions may be initiated based on detection of tampering.

Techniques for tamper detection and protection of a memory module

An apparatus is described that includes a memory card. The memory card also includes volatile memory devices. The memory card also includes non volatile memory devices. The memory card is configurable to implement a first portion of the storage space of the non volatile memory devices as system memory. The memory card also includes a controller to manage, upon a power down event, the transfer of information from the volatile memory devices into a second portion of the storage space of the non volatile memory devices.

Memory card with volatile and non volatile memory space having multiple usage model configurations

Methods and apparatus related to supporting both DDR (Double Data Rate) and NVM (Non-Volatile Memory) DIMM (Dual Inline Memory Module) on the same memory slot are described. In one embodiment, a DIMM comprises volatile memory and non-volatile memory, and data is communicated with the volatile memory and the non-volatile memory via a single memory slot. Other embodiments are also disclosed and claimed.

Supporting multiple memory types in a memory slot

Embodiments are generally directed to accelerated address indirection table lookup for wear-leveled non-volatile memory. A embodiment of a memory device includes nonvolatile memory; a memory controller; and address indirection logic to provide address indirection for the nonvolatile memory, of the address indirection logic to maintain an address indirection table (AIT) in the nonvolatile memory, the AIT including a plurality of levels, and copy at least a portion of the AIT to a second memory, the second memory having less latency than the first memory.

Accelerated address indirection table lookup for wear-leveled non-volatile memory

A memory module can include a data buffer having a data bus interface and a dynamic random access memory (DRAM) coupled to the data buffer. The memory module may also include a switch connected in parallel with the data buffer, wherein the switch can selectively bypass the data buffer. In one example, the memory module also includes a registered buffer having an address bus interface, where the switch may selectively bypass the data buffer based on a program signal obtained from an address bus via the address bus interface.

Reconfigurable load-reduced memory buffer

A receiver for use in a system implementing antenna diversity uses a switch to allow multiple filters to share a low noise amplifier (LNA).

Method and apparatus to provide an area efficient antenna diversity receiver

An integrated circuit comprising a conductive region formed on a semiconductor substrate, a silicate glass layer formed on the conductive region, and an etch stop layer formed on the silicate glass layer. The integrated circuit also includes a borderless contact that is coupled to the conductive region.

Integrated circuit with borderless contacts

An improved integrated circuit and method for making it are described. The integrated circuit includes a shallow trench isolation structure formed adjacent to a well. A borderless contact makes electrical contact to a conductive region formed on the well and an insulating spacer is formed adjacent to a sidewall of the conductive region.

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Chandler, AZ, United States of America

Mohamed Arafa