Shindengen Electric Manufacturing Company Limited

Mizue Kitada

Shinji Kunori

Daisuke Arai

Takeshi Asada

Toru Kurosaki

Kosuke Ohshima

Hiroaki Shishido

Noriaki Suzuki

Takeshi Yamaguchi

Masato Mikawa

Shigeru Hisada

Koichi Murakami

Toshiyuki Takemori

Akihiko Sugai

Kosuke Ohsima

Kosuke Oshima

Masahiro Kuriyama

Toshihiro Okuda

Gotaro Takemoto

A MOSFET includes: a semiconductor base substrate having an n-type column region and a p-type column region, the n-type column region and the p-type column region forming a super junction structure; and a gate electrode formed by way of a gate insulation film. Assuming a region of the semiconductor base substrate which provides a main operation of the MOSFET as an active region, a region of the semiconductor base substrate maintaining a withstand voltage of the MOSFET as an outer peripheral region, and a region of the semiconductor base substrate disposed between the active region and the outer peripheral region as an active connecting region, out of the active region, the active connecting region, and the outer peripheral region of the semiconductor base substrate, the crystal defects are formed only in the active region and the active connecting region.

Method of manufacturing MOSFET having a semiconductor base substrate with a super junction structure

A semiconductor device includes: a semiconductor base substrate including a semiconductor layer; a first main electrode; a second main electrode; a plurality of peripheral trenches formed on a surface of the semiconductor layer and having bottom portions covered by the semiconductor layer in a peripheral region; and a plurality of in-trench electrodes each embedded in each of the plurality of peripheral trenches byway of an insulation layer formed on an inner surface of the each peripheral trench, wherein the semiconductor base substrate further includes, in the peripheral region, a plurality of second conductive type floating regions disposed in the semiconductor layer at a depth position deeper than the bottom portions of the peripheral trenches in a spaced apart manner from the peripheral trenches and having a potential in a floating state.

Semiconductor device and method of manufacturing semiconductor device

MOSFET, having a semiconductor base substrate with a super junction structure, method of manufacturing the MOSFET, and power conversion circuit having the MOSFET

A power conversion circuit includes: a MOSFET having a super junction structure; an inductive load; and a freewheel diode. A switching frequency of the MOSFET is 10 kHz or more. When the MOSFET is turned off, a first period during which a drain current decreases, a second period during which the drain current increases, and a third period during which the drain current decreases again appear in this order. The freewheel diode is an Si-FRD or an SiC-SBD, and current density obtained by dividing a current value of the forward current by an area of an active region of the freewheel diode falls within a range of 200 A/cmto 400 A/cmwhen the freewheel diode is the Si-FRD, and the current density falls within a range of 400 A/cmto 1500 A/cmwhen the freewheel diode is the SiC-SBD.

Power conversion circuit

A MOSFET according to the present invention includes a semiconductor base substrate having a super junction structure. A gate electrode is on a first main surface side of the semiconductor base substrate by way of a gate insulation film, wherein in a state where a total amount of dopant in an n-type column region differs from a total amount of dopant in a p-type column region, assuming a depth position where an average positive charge density &#x3c1;(x) becomes 0 as X', assuming a deepest depth position of the surface of the depletion layer on the first main surface side as X&#x2032;, assuming a depth position where the reference average positive charge density &#x3c1;(x) becomes 0 as X, and assuming a deepest depth position of the depletion layer on the first main surface side as X, a relationship of |X&#x2212;X&#x2032;|&#x3c;|X&#x2212;X&#x2032;| is satisfied.

MOSFET and power conversion circuit

A MOSFET includes: a semiconductor base substrate having n-type column regions and p-type column regions, the n-type column regions and the p-type column regions forming a super junction structure; and a gate electrode which is formed on a first main surface side of the semiconductor base substrate by way of a gate insulation film, wherein crystal defects whose density is increased locally as viewed along a depth direction are formed in the n-type column regions and the p-type column regions, using the first main surface as a reference and assuming a depth to a deepest portion of the super junction structure as Dp, a depth at which density of the crystal defects exhibits a maximum value as Dd, and a half value width of density distribution of the crystal defects as W, a relationship of 0.25Dp&#x2264;Dd&#x3c;0.95Dp and a relationship of 0.05Dp&#x3c;W&#x3c;0.5Dp are satisfied.

Semiconductor device having crystal defects and method of manufacturing the semiconductor device having crystal defects

A MOSFET used in a power conversion circuit including a reactor, a power source, the MOSFET, and a rectifier element, includes a semiconductor base substrate having an n-type column region and a p-type column region, the n-type column region and the p-type column region forming a super junction structure, the n-type column region and the p-type column region are formed such that a total amount of a dopant in the p-type column region is set higher than a total amount of a dopant in the n-type column region, and the MOSFET is configured to be operated in response to turning on of the MOSFET such that at a center of the n-type column region as viewed in a plan view, a low electric field region having lower field intensity than areas of the n-type column region other than the center of the n-type column region appears.

A MOSFET includes a semiconductor base substrate where a super junction structure is formed of an n-type column region and a p-type column region. A total amount of a dopant in the n-type column region is set to a value greater than a total amount of a dopant in the p-type column region. The MOSFET is configured to be operated during a period from a point of time when a drain current starts to decrease to a point of time when the drain current becomes 0 for the first time in response to turning off of the MOSFET such that a first period during which the drain current is decreased, a second period during which the drain current is increased or the drain current becomes constant, and a third period during which the drain current is decreased again occur in this order.

MOSFET

Provided is a MOSFET which includes: a semiconductor base substrate having an n-type column region and a p-type column region, a base region and a source region, wherein a super junction structure is formed of the n-type column region and the p-type column region; a trench having side walls and a bottom; a gate electrode formed in the trench by way of a gate insulation film; a carrier compensation electrode positioned between the gate electrode and the bottom of the trench; an insulation region separating the carrier compensation electrode from the side walls and the bottom; and a source electrode electrically connected to the source region and also electrically connected to the carrier compensation electrode. According to the MOSFET of the present invention, even when an irregularity in a charge balance occurs around the gate, an irregularity in switching characteristics when the MOSFET is turned off can be decreased.

A power semiconductor device of the present invention includes: a semiconductor base body which has a super junction structure formed of a plurality of first conductive-type columnar regions and a plurality of second conductive-type columnar regions; a plurality of trenches; gate insulation films; gate electrodes; an interlayer insulation film; contact holes formed such that two or more contact holes are formed between two trenches disposed adjacently to each other; metal plugs formed by filling the inside of the contact holes with metal; and an electrode, wherein a first conductive-type high concentration diffusion region is formed only between the trench and the metal plug disposed closest to the trench between each two trenches disposed adjacently to each other. According to the power semiconductor device of the present invention, it is possible to provide a power semiconductor device which satisfies a demand for reduction in cost and downsizing of electronic equipment, and has a large breakdown strength.

Power semiconductor device having a first and a second conductive-type columnar regions formed alternately with each other and method of manufacturing the power semiconductor device

A power semiconductor device according to the present invention has a super junction structure, and includes a low-resistance semiconductor layer, an n&#x2212;-type column region, p&#x2212;-type column regions, a base region, trenches, gate insulation films, gate electrodes, source regions, interlayer insulation films, contact holes, metal plugs, p+-type diffusion regions, a source electrode and a gate pad electrode. An active element part includes an n&#x2212;-type column region between a predetermined p&#x2212;-type column region disposed closest to a gate pad part and a predetermined n&#x2212;-type column region disposed closest to the gate pad part among the n&#x2212;-type column regions which are in contact with the trenches. The present invention provides a power semiconductor device which can satisfy a demand for reduction in cost and downsizing of electronic equipment, can lower ON resistance while maintaining a high withstand voltage, and can possess a large breakdown resistance.

Power semiconductor device and method of manufacturing power semiconductor device

A semiconductor device includes: a semiconductor base body where a second semiconductor layer is stacked on a first semiconductor layer, a trench is formed on a surface of the second semiconductor layer, and a third semiconductor layer which is formed of an epitaxial layer is formed in the inside of the trench; a first electrode; an interlayer insulation film which has a predetermined opening; and a second electrode, wherein metal is filled in the opening, the opening is disposed at a position avoiding a center portion of the third semiconductor layer, the second electrode is connected to the third semiconductor layer through the metal, and a surface of the center portion of the third semiconductor layer is covered by the interlayer insulation film.

A MOSFET includes: a semiconductor base substrate having a super junction structure; and a gate electrode formed on a first main surface side of the semiconductor base substrate by way of a gate insulation film. In a graph where a depth x at a predetermined depth position in the super junction structure is taken on an axis of abscissas, and an average positive charge density &#x3c1;(x) at the predetermined depth position in the super junction structure is taken on an axis of ordinates, the average positive charge density &#x3c1;(x) at a predetermined depth position of the super junction structure when the super junction structure is depleted by turning off the MOSFET is expressed by an upward convex curve projecting in a right upward direction.

A semiconductor device includes a drift layerof a first conductivity type, a base layerof a second conductivity type that is disposed on the drift layerand is connected to a source electrode, and a column layerof a second conductivity type that is connected to the source electrodeand penetrates the base layerto extend into the drift layer

Semiconductor device

A transistor and diode having a low resistance and a high breakdown voltage are provided. When the bottom portion of a narrow trench having the shape of a rectangular parallelepiped is filled with a semiconductor grown by epitaxial method, a {1 0 0} plane is exposed at the sidewalls of the narrow trench. The semiconductor is epitaxially grown at a constant rate on each sidewall of the narrow trench; thereby, creating a filling material with no voids present therein. The concentration and width of the filling material are optimized. This allows the portion located between the filling materials in a drain layer to be completely depleted when the filling material is completely depleted; thereby, making it possible to establish an electric field having a constant strength in the depletion layer extended in the drain layer.

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Saitama, Japan

Mizue Kitada