Kabushiki Kaisha Toshiba

Miyuki Nagata

Takeji Tokumaru

Tohru Utsumi

An information processing apparatus executes a machine language instruction according to a microprogram controlling method. The apparatus comprises an instruction decoder for decoding the machine language instruction; an operand controller for receiving from the instruction decoder, information about operands that are necessary in executing the machine language instruction, and fetching and holding the operands according to the information; and an instruction executing device generating operand requests to the operand controller, obtaining the operands, and executing the machine language instruction under the control of a microprogram. Thus, the apparatus can execute a plurality of machine language instructions that respectively prescribe the same operation to be carried out on the different kinds of operands, under the control of a single microprogram irrespective of the differences of the kinds of the operands.

Processor having different operand source information temporarily stored

In a microprocessor, a microinstruction is used to control the microprocessor. The microprocessor includes: a decoder for decoding the STC instruction to obtain a decoded instruction and address data, the address data designating an address of a control space allocated to a plurality of registers in a general-purpose register group; an address register for temporarily storing the address data derived from the decoder; a microinstruction storage unit for previously storing a plurality of microinstructions and for outputting the microinstruction one by one in response to the decoded instruction; a microinstruction register for producing a control signal in response to the read microinstruction; a calculation unit for calculating the address data sotred in the address register means to obtain bit information of the address data for designating a specific register in response to the bit information derived from the calculation unit, while the general-purpose register group; and, a pointer register for temporarily storing the bit information to access the specific register in response to the bit information derived from the calculation unit, while the general-purpose register group is instructed in response to the control signal.

Method for accessing microprocessor and microinstruction control type

A data processor having an inner instruction register, a microinstruction register, and microinstruction decoder for decoding the microinstruction stored in the microinstruction register, and a data expansion section for expanding data bits stored in source and destination registers among general purpose registers when designated by an inner instruction in which the bit lengths of data to be processed can be designated by an inner instruction, a microinstruction for performing the operation of data having same contents but different bit lengths can be made common, thereby reducing the number of steps of the microprograms.

Data processor employing the same microprograms for data having

Where an N-bit input data is rotated together with a carry bit by an N-bit or more rotate count, the actual rotate count is obtained as a remainder or modulo of x/N+1 (x: rotate count; N: data bit length). The above remainder will not be obtained by simply masking shift signals. Therefore, the remainder is calculated at high speed through hardware including a subtrahend calculator section for calculating (N+1) (i) (i=0, 1, 2, . . . ) and a subtracter section for calculating {x-(N+1) (i)} to obtain a modulo or a remainder representative of an actual rotate count.

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Yokohama, Japan

Miyuki Nagata