Renesas Electronics Corporation

Renesas Technology Corp.

Mitsutoshi Shirota

Toshiki Kanamoto

Michiko Uchimura

A memory cell information producing unit obtains physical terminal coordinates, physical terminal names and logical terminal names of a memory cell and layout data, and operates based on them to specify parasitic elements parasitic on interconnections of the memory cell, and to produce memory cell information including the physical terminal names and representing physical properties and a connection relationship of inner elements of the memory cell and the parasitic elements. Memory cell array information producing unit obtains connection information determining the connection relationship of physical terminals of the memory cell, assigns node names to the physical terminals of the memory cell based on the connection information, and produces memory cell array information representing the node names of all the memory cells. A memory cell array net list producing unit produces a net list of the memory cell array formed of the memory cell information and the memory cell array information.

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Tokyo, Japan

Mitsutoshi Shirota