Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Mitsuteru Iijima

Takeshi Takagi

Zhiqiang Wei

Takumi Mikawa

Koji Arita

Takashi Okada

Koji Katayama

Kazuhiko Shimakawa

Shunsaku Muraoka

Yoshihiko Kanzawa

Ryotaro Azuma

Ken Kawai

Kenji Tominaga

A stacking structure in which a stacked body () including a first conductive layer (), a semiconductor layer (), and a second conductive layer () and an interlayer insulating film () are alternately stacked in parallel to a substrate, a plurality of columnar electrodes () arranged so as to penetrated through the stacking structure in a stacking direction, a variable resistance layer () which is disposed between the columnar electrode () and the first conductive layer () and which has a resistance value that reversibly changes according to an application of an electric signal are included. The variable resistance layer () is formed by oxidizing part of the first conductive layer (). The variable resistance layer () and an insulating film for electrically separating the semiconductor layer () and the second conductive layer () from the columnar electrode () are simultaneously formed in a single oxidation process.

Non-volatile memory cell, non-volatile memory cell array, and method of manufacturing the same

A manufacturing method for manufacturing, with a simple process, a non-volatile memory apparatus having a stable memory performance includes: (a) forming a stacking-structure body above a substrate by alternately stacking conductive layers comprising a transition metal and interlayer insulating films comprising an insulating material; (b) forming a contact hole penetrating through the stacking-structure body to expose part of each of the conductive layers; (c) forming variable resistance layers by oxidizing the part of each of the conductive layers, the part being exposed in the contact hole, and each of the variable resistance layers having a resistance value that reversibly changes according to an application of an electric signal; and (d) forming a pillar electrode in the contact hole by embedding a conductive material in the contact hole, the pillar electrode being connected to each of the variable resistance layers.

Method for manufacturing non-volatile memory device, non-volatile memory element, and non-volatile memory device

Provided is a method for driving a non-volatile memory element in which a variable resistance element including a first electrode, a second electrode, and a variable resistance layer capable of reversibly changing between a high resistance state and a low resistance state with application of electrical signals having different polarities is connected in series with a current steering element having bidirectional rectifying characteristics with respect to an applied voltage. After the non-volatile memory element is manufactured, the resistance value of the variable resistance layer is reduced from a resistance value in the initial resistance state higher than that in the high resistance state by applying, to the non-volatile memory element, a voltage pulse having the polarity identical to that of the voltage pulse for changing the variable resistance layer from the low resistance state to the high resistance state in the normal operations.

Method for driving non-volatile memory element, and non-volatile memory device

Programming a variable resistance element includes: a writing step of applying a writing voltage pulse to transition metal oxide comprising two stacked metal oxide layers to decrease resistance of the metal oxide, each metal oxide layer having different oxygen deficiency; and an erasing step of applying an erasing voltage pulse, of different polarity than the writing pulse, to the metal oxide to increase resistance of the metal oxide. |Vw|&#x3e;|Vw|. Vwrepresents writing voltage for first to N-th steps. Vwrepresents writing voltage for (N+1)-th and subsequent steps, where N&#x2267;1, |Ve|&#x3e;|Ve|. Verepresents erasing voltage for first to M-th steps. Verepresents erasing voltage for M+1-th and subsequent steps. tw&#x3c;te. twrepresents writing pulse width for first to N-th steps. terepresents erasing pulse width for first to M-th steps. M&#x2267;1. The (N+1)-th writing step follows the M-th erasing step.

Method of programming variable resistance element, method of initializing variable resistance element, and nonvolatile storage device

A method for programming a nonvolatile memory device according to the present invention includes a step of detecting an excessively low resistance cell from among a plurality of memory cells () (S); a step of changing the resistance value of a load resistor () to a second resistance value smaller than a first resistance value (S); and a step of causing, by applying a voltage pulse to a series circuit including the excessively low resistance cell and the load resistor () having the second resistance value, a variable resistance element () included in the excessively low resistance cell to shift to a second high resistance state having a resistance value greater than that of the first low resistance state (S).

Nonvolatile memory device and method for programming the same

Programming a variable resistance element includes: a writing step of applying a writing voltage pulse to transition metal oxide comprising two stacked metal oxide layers to decrease resistance of the metal oxide, each metal oxide layer having different oxygen deficiency; and an erasing step of applying an erasing voltage pulse, of different polarity than the writing pulse, to the metal oxide to increase resistance of the metal oxide. |Vw1|&#x3e;|Vw2|, Vw1 representing voltage of the writing pulse for first to N-th writing steps, and Vw2 representing voltage of the writing pulse for (N+1)-th and subsequent writing steps, N being at least equal to 1, te1&#x3e;te2, te1 representing pulse width of the erasing pulse for first to M-th erasing steps, and te2 representing pulse width of the erasing pulse for (M+1)-th and subsequent erasing steps. M&#x3e;1. The (N+1)-th writing step follows the M-th erasing step.

Method of programming variable resistance element,  method of initializing variable resistance element, and nonvolatile storage device

A memory element () arranged in matrix in a memory device and including a resistance variable element () which switches its electrical resistance value in response to a positive or negative electrical pulse applied thereto and retains the switched electrical resistance value; and a current control element () for controlling a current flowing when the electrical pulse is applied to the resistance variable element (); wherein the current control element () includes a first electrode; a second electrode; and a current control layer sandwiched between the first electrode and the second electrode; and wherein the current control layer comprises SiN, and at least one of the first electrode and the second electrode comprises &#x3b1;-tungsten.

Current control element, memory element, and fabrication method thereof

A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element () including: a variable resistance element () whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element () that steers current flowing through the variable resistance element () when the electric pulses are applied, the current steering element () includes: a first electrode (); a second electrode (); and a current steering layer () interposed between the first electrode () and the second electrode (). When the current steering layer () includes SiN(0&#x3c;x&#x2266;0.85) and a thickness of d [nm], a relationship between a nitrogen composition ratio x and the thickness d is in a range represented by a predetermined conditional expression.

Current steering element, storage element, storage device, and method for manufacturing current steering element

A nonvolatile memory element includes a current controlling element having a non-linear current-voltage characteristic, a resistance variable element which changes reversibly between a low-resistance state and a high-resistance state in which a resistance value of the resistance variable element is higher than a resistance value of the resistance variable element in the low-resistance state, in response to voltage pulses applied, and a fuse. The current controlling element, the resistance variable element and the fuse are connected in series, and the fuse is configured to be blown when the current controlling element is substantially short-circuited.

Nonvolatile memory element and semiconductor memory device including nonvolatile memory element

Each of memory cells (MC) includes one transistor and one resistance variable element. The transistor includes a first main terminal, a second main terminal and a control terminal. The resistance variable element includes a first electrode, a second electrode and a resistance variable layer provided between the first electrode and the second electrode. A first main terminal of one of two adjacent memory cells is connected to a second main terminal of the other memory cell, to form a series path (SP) sequentially connecting main terminals of the plurality of memory cells in series. Each of the memory cells is configured such that the control terminal is a part of a first wire (WL) associated with the memory cell or is connected to the first wire associated with the memory cell, the second electrode is a part of a second wire (SL) associated with the memory cell or is connected to the second wire associated with the memory cell; and the first electrode is a part of a series path (SP) associated with the memory cell or is connected to the series path associated with the memory cell.

Resistance variable nonvolatile memory device

In a current rectifying element (), a barrier height &#x3c6;A of a center region () of a barrier layer () in a thickness direction thereof sandwiched between a first electrode layer () and a second electrode layer () is formed to be larger than a barrier height &#x3c6;B of a region in the vicinity of an interface () between the barrier layer () and the first electrode layer () and an interface () between the barrier layer () and the second electrode layer (). The barrier layer () has, for example, a triple-layer structure of barrier layers (), () and (). The barrier layers (), () and () are, for example, formed by SiN layers of SiNx, SiNx, and SiNx(X1&#x3c;X2). Therefore, the barrier layer () has a barrier height in which the shape changes in a stepwise manner and the height of the center regionis large.

Current rectifying element, memory device incorporating current rectifying element, and fabrication method thereof

Provided is a nonvolatile storage device () capable of stably operating without increasing a size of a selection transistor included in each of memory cells. The nonvolatile storage device () includes: a semiconductor substrate () which has a P-type well () of a first conductivity type; a memory cell array () which includes memory cells (M) or the like each of which includes a variable resistance element (R) and a transistor (N) that are formed above the semiconductor substrate () and connected in series; and a substrate bias circuit () which applies, to the P-type well (), a bias voltage in a forward direction with respect to a source and a drain of the transistor (N), when a voltage pulse for writing is applied to the variable resistance element (R) included in the selected memory cell (M) or the like.

Growing community of inventors

Osaka, Japan

Mitsuteru Iijima