Sony Corporation

Mitsushige Tatami

Norio Ebihara

Yoshinori Suzuki

Shosuke Tanaka

Kazunobu Tsujikawa

Junichi Yanagisawa

Yasuo Sakura

Hidetoshi Nishimoto

Described herein is the converting between a component SDI signal D1 and a composite SDI signal D2. A single memory is prepared. Further, the corresponding signal is written into the memory in accordance with a clock corresponding to a transfer rate of the SDI signal D1 and the corresponding signal is read from the memory in accordance with a clock corresponding to a transfer rate of the SDI signal D2. The digital signal read from the memory is re-distributed based on header information added to the SDI signal D2. Pieces of header information (ADF, DID, DBN, DC and CS) corresponding to conversion modes are added to the outputted digital signal. Thus, the cost down to the signal converting can be achieved by providing a single signal conversion memory alone and reducing signal conversion memories and their peripheral circuits.

Signal converting apparatus and method

A time base corrector converts an analog input PAL image signal including a certain time base error to digital form and then stores it in a memory by using a write clock signal derived from the input image signal including the time base error. The stored signal is read out from the memory by a reference readout clock signal to eliminate the time base error, and a reference color burst signal is added to it. The time base corrector extracts a color subcarrier signal from the input image signal, samples the color subcarrier signal by using a first clock signal in a manner such that U-axis data and V-axis data of the color subcarrier signal are generated independently of each other, compares the polarity of the V-axis data of the color burst of the sampled color subcarrier signal with the polarity of the V-axis data of the reference color burst signal, and selectively inverts the polarity of the V-axis data of the color burst of the sampled color subcarrier signal on the basis of the comparison result.

PAL video time base corrector inverts color difference signal (V) axis

A time base error corrector comprises a chrominance subcarrier phase corrector whereby the subcarrier phase of a video signal is controlled before being written in the buffer memory in such a way that when the video signal is read from the buffer memory on the basis of the reference video signal, the subcarrier phase of the read video signal may match that of the reference video signal. In the NTSC system, the succeeding line odd/even (O/E) identification is predicted on the basis of a content O/E of the preceding field identification and a content O/E of the preceding field top line identification, and a non-inverted return subcarrier signal is generated when the succeeding top line identification is determined to be odd but an inverted return subcarrier signal RSC is generated when determined to be even. In the system, the succeeding line O/E odd/even and I/N inversion/non-inversion identifications are predicted to generate four different return subcarrier signals. The above control is effective when a VTR is servo-controlled in such a way that the reproduced video signal is written in the buffer memory in advance of the reference video signal in phase.

Time base error corrector

An apparatus for correcting time base errors and for compensating for dropouts in a reproduced video signal includes a single random access memory for storing digital video data, a correct video data producing circuit connected to the memory for producing correct video data from data read out from the memory, a switching circuit controlled by a dropout detecting pulse for supplying either the digital video data or the correct video data to the memory and a control circuit for controlling read and write address operations of the memory. The read and write address operations include the generation of a write address signal indicating a write address at which an output signal of the switching circuit is written upon generation of the write address signal, a first read address signal asynchronous with the write address signal indicating a read address from which data is read out without time base errors and a second read address signal generated previous to the generation of the write address signal indicating an address differing from the write address by a predetermined distance so that data read out from the memory is supplied back to the memory for compensating for dropout errors. The timing and address differences of the three address signals enable the single memory to be used in place of two separate memories.

Apparatus for correcting a time base error and for compensating dropouts

A phase-locked loop for generating an output signal whose phase is locked onto that of a reference signal and whose frequency is offset in respect to an integral multiple of the reference signal frequency comprises a variable-frequency oscillator the output frequency of which is adapted to be varied according to an error signal output from a phase comparator. A frequency divider divides the output frequency from the variable-frequency oscillator by a predetermined dividing ratio, and a phase modulator is supplied with the output of the frequency divider and controlled so that its phase shift amount is increased with time. The output of the phase modulator is compared, in the phase comparator, with the reference signal, the dividing ratio of the frequency divider is changed at intervals related to the offset frequency, and the phase shift amount of the phase modulator is reset at the same time.

Phase locked loop with frequency offset

A method and system for converting an analog video input signal into a digital video signal corrects for jitter and other spurious input frequency errors without the need for a time base correction circuit. The phase of the video input signal relative to a reference pulse signal is measured at two points of time during video signal processing and the two measured phase values are compared to derive a phase error signal indicative of the spurious phase error for a corresponding horizontal scan line. The phase error signal is then used to adjust the phase of sampling clock pulses used to sample analog video input signal values of the corresponding scan line for conversion to digital values. Each clock pulse is phase-shifted only slightly, as the derived spurious phase error is distributed evenly among all of the clock pulses for the corresponding scan line. Preferably, the phase error is distributed linearly across the corresponding scan line and mirror-symmetrically about the center of the scan line.

Method and system for processing digital video signal incorporating

The burst signal of a color television signal is sampled at a rate which is a multiple of the burst signal frequency. A theoretical sample level of the burst signal is determined as a function of at least two of the actual sample levels thereof, the theoretical sample level representing a sample level that would be obtained if the burst signal is sampled at a predetermined phase angle. Based on the theoretical sample level and a predetermined one of the actual sample levels, a determination is made as to whether the burst signal actually is sampled at the predetermined phase angle. The phase of the sampling pulses which are used to sample the burst signal, is adjusted in accordance with the determination, such that the burst signal is sampled at the predetermined phase angle.

Method and apparatus for determining and controlling the sampling phase

When levels of chrominance signals reproduced from a helical scan video tape recorder are controlled, two types of control signals are generated based on a level of color burst signal of the reproduced chrominance signals. One of the two control signals is responsive to relatively rapid level changes, and the other thereof is responsive to stationary errors based on head-tape contacting pressure changes during one revolution of a rotary video head.

Automatic chroma level control circuit for compensating both slow and

Apparatus is provided for indicating the phase of the color subcarrier signal present during each line of a color television signal so as to identify whether that line is odd or even. A phase detector detects the phase of the color subcarrier signal at a predetermined time following the occurrence of the horizontal synchronizing signal. The actual time at which the phase of the color subcarrier signal is detected is adjusted by an automatic phase adjustment circuit which senses relative phase shifts between the horizontal synchronizing signal and the color subcarrier signal. Preferably, the phase detector is a sampling circuit which samples the color subcarrier signal at a sampling time which is adjustable by the automatic phase adjustment circuit so as to cancel relative phase shifts between the sampling time and the color subcarrier signal.

Apparatus for indicating the phase of the color subcarrier signal in

Apparatus is disclosed for use in a video signal reproducing system of the type having first and second rotary reproducing transducers for reproducing video and vertical synchronizing signals from record tracks on a record medium, in which the transducers exhibit a predetermined angular separation therebetween, the video signal reproducing system also having means for producing a reference synchronizing signal in phase synchronism with the vertical synchronizing signal reproduced by the first transducer. The apparatus is adapted to produce a substantially phase synchronized reference signal regardless of the particular transducer which is used to reproduce the video signals. The apparatus comprises a delay circuit for delaying the reference synchronizing signal by an amount corresponding to the predetermined angular separation between the transducers; and a switching circuit supplied with this delayed as well as the undelayed reference synchronizing signal. A switch control circuit supplies a switch control signal to the switching circuit to determine whether the delayed or undelayed reference synchronizing signal should be selected, the switch control circuit including a detector for detecting the phase relationship between the vertical synchronizing signal which then is being reproduced and the reference synchronizing signal.

Apparatus for producing a phase-synchronized reference signal in a video

Improved time base error correcting apparatus of the type wherein time base errors in a video signal, such as a video signal reproduced by a video signal playback device, are corrected. The apparatus includes a main memory into which picture elements contained in each line interval of the video signal are written at a write-in rate that is synchronized with the time base information contained in that video signal, and from which the picture elements are read out at a reference rate. A drop-out detector detects drop-out conditions which may occur in the video information and synchronizing information portions of the video signal. Drop-out indications are stored in a drop-out condition memory so as to represent the positions within a line interval that drop-out has occurred. These drop-out indications are written into and read out of the drop-out condition memory in synchronism with the writing in and reading out of picture elements from the main memory. Each picture element read out from the main memory is supplied to a drop-out compensator which is responsive to a read out drop-out indication to replace a dropped out picture element that is read out from the main memory with the picture element which had been in the same relative position in the immediately preceding line interval. A velocity error correcting device also is provided in order to correct velocity errors which may be present in each line interval. In the event that a velocity error cannot be detected, for example, because drop-out has occurred in the synchronizing portion of a line interval, the velocity error which had been detected for the previous line interval is used again in this and then the next-following interval, i.e., for a total of three consecutive line intervals. An offset voltage is added to the velocity error correcting operation for this third line interval, except that this offset voltage is subtracted during a drop-out compensating operation in that third line interval.

Time base error correcting apparatus

A PAL color video signal which is reproduced in a special mode, such as a slow, still or fast-forward or reverse mode is re-arranged in order to recover the standard signal sequence of the color television system. In the case of the luminance signal component, two adjacent lines of reproduced video signals are mixed in order to avoid vertical shifting of the reproduced image if the numbers of a reproduced field and a reference field are different. In the case of the chrominance signal component, a phase-inversion and/or a signal delay of 1H interval are carried out in order to coincide the chrominance phase sequence of the reproduced PAL color signal with the sub-carrier phase sequence which is standard for the color television system. The need for a phase-inversion and/or a signal delay is determined on the basis of an examination of a reproduced color field and a reference color field.

Color video signal processing system

A quasi-vertical synchronizing signal generator is disclosed, for use with a helical scan video tape recorder (VTR) to generate a quasi-vertical synchronizing signal during a special video effects reproducing operation, which signal occurs at the same relative location during the scanning trace of the reproducing head even if the effective length of that trace varies in accordance with the special video effects then in operation. A signal is produced when the head reaches a pre-established location in the track which it is scanning, and then a delayed signal, which is delayed from the time that the head reached the pre-established location, is generated, this delayed time being selectable as a function of the particular special video effect which has been selected for operation. The delayed signal constitutes the quasi-vertical synchronizing signal. If the selected special video effect results in a longer-than-normal effective length of the scanning trace, then the quasi-vertical synchronizing signal is produced with a greater delay than if the selected special video effect results in a scanning trace of smaller-than-normal effective length.

Quasi-vertical synchronizing signal generator

In a television reproduction system in which recorded video for one field, either odd or even, is repeatedly scanned, such as for still or slow motion reproduction, and is displayed with a locally generated synchronizing signal which produces interlaced scanning having both odd and even fields on a television screen, video from adjacent lines is averaged when the recorded field being scanned is an odd or even field and the field defined by the synchronizing signal is the opposite type. When the recorded video is a color video signal, the luminance and chrominance components of the video signal are separately averaged, the chrominance component is inverted in dependence on the relationship between the phase of the color subcarrier of the recorded line being reproduced and the phase of the color subcarrier of the locally generated synchronizing signal.

System for removing vertical vibrations from reproduced video

A synchronizing signal generator for a PAL-TV (television) signal processing system has a pulse oscillator which produces a pulse with the frequency n.multidot.f.sub.sc in which f.sub.sc is the frequency of a color subcarrier signal and n is an integer selected to satisfy the following relation:

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Kanagawa, Japan

Mitsushige Tatami