Nec Electronics Corporation

Renesas Electronics Corporation

Mitsuru Yoshida

Hiroshi Yanagigawa

A semiconductor integrated circuit device includes an output transistor, an overcurrent detection circuit and overcurrent limitation circuit. The overcurrent detection circuit includes a first transistor detecting an overcurrent of the output transistor. The overcurrent limitation circuit is connected between a gate and a source of the output transistor. The overcurrent limitation circuit includes a plurality of resistance elements and a diode connected in series between the gate and the source of the output transistor in series, and a second transistor whose gate is connected to a connection point between the resistance elements and that is cascade connected to the first transistor.

Semiconductor integrated circuit device having overcurrent limitation circuit

In a semiconductor device including a semiconductor element to be protected having first and second electrodes, and a protection circuit coupled between the first and second electrodes, a switch circuit is inserted between the first and second electrodes in series to the protection circuit. The switch circuit is turned ON by such a voltage that turns ON the semiconductor element.

Semiconductor device including protection circuit and switch circuit and its testing method

In a dead time control circuit, a delay circuit is connected to an input terminal and adapted to delay signals therethrough by a delay time corresponding to a dead time. A logic circuit has a first input connected via the delay circuit to the input terminal, a second input connected directly to the input terminal, and an output connected to an output terminal. The dead time having adjustable temperature characteristics.

Dead time control circuit capable of adjusting temperature characteristics of dead time

A current limiting circuit capable of increasing a range of applicable load values is disclosed. An output circuit () may include a current limiting circuit. A current limiting circuit may include a voltage detecting circuit () and a voltage clamping circuit (). A voltage detecting circuit () may detect a plurality of output voltages (Vout). Voltage clamping circuit () may clamp a control terminal of an output transistor (M) to a plurality of clamped voltages in response to the plurality of detected output voltages (Vout). In this way, an output transistor (M) may have a plurality of current limitation values as an output voltage (Vout) changes. By doing so, an output circuit () may be applicable to a multitude of load (LOAD) values and properly operate without risks of overcurrent or undesired quiescent operating states being entered, as just two examples.

Current limiting circuit and output circuit including the same

A semiconductor integrated circuit of the present invention has an output field-effect transistor formed on a main surface of a semiconductor substrate; an overcurrent detection circuit detecting an overcurrent of the output field-effect transistor; and an overcurrent limiting circuit which is connected between the gate electrode terminal and the source electrode terminal of the output field-effect transistor, controls the detected current of the overcurrent detection circuit and varies its output voltage according to variation in threshold voltage of the output field-effect transistor.

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Shiga, Japan

Mitsuru Yoshida