Fujitsu Corporation

Mitsuru Tsuboi

Naoji Fujino

Toshiaki Nobumoto

Naoshi Matsuo

Nobuhide Eguchi

Noboru Kobayashi

Akira Takeyama

Satoshi Nojima

Susumu Tominaga

Koji Okazaki

Toshiyuki Ohta

Takahiro Aramaki

Miki Murakawa

Takao Matsuda

Shoji Tominaga

Yutaka Moriyama

Naomi Suga

Ken-ichi Abiru

Naomi Nishiyama

An apparatus synchronizes a voice coder and a voice decoder which are of the vector-coding type in order to prevent a false synchronization even when a signal having the same period as a string of synchronizing bits is inputted. A noise component adding unit adds a noise component to an input voice signal. Therefore, even if the input voice signal has the same period as that of a string of synchronizing bits and is completely periodic, the periodicity of the input voice signal is lost by the added noise component. Based on the input voice signal which is no longer periodic, a vector-coding unit, a quantizing signal vector generating unit, and a code book index transmitting unit generate code book indexes and transmit the generated code book indexes to a voice decoder. Therefore, the voice decoder is prevented from developing a false synchronization.

Apparatus for synchronizing a voice coder and a voice decoder of a

The coder generates code information A.sub.1 -A.sub.N, each representing one of Q quantization points of an input signal, where Q is an integer equal to or less than 2.sup.x and X is a positive number, synthesizes the code information A.sub.1 -A.sub.N into a code H through an operation:

Coding/decoding apparatus and method

The high performance multiplexed transmission system of this invention is configured by a sound coding unit for coding voice input information by separating it into a core information part for assuring the minimum acceptable sound quality and a supplementary information part discardable in stages per the transmission priorities. There is a silent section detecting unit for detecting silent sections of voice input information. In addition, there is a multiplexing unit for multiplexing only the information synchronizing with the correspondent's coder for the voice channels from which no sound is detected, or first the core information part and second the supplementary information part from the ones with the highest priorities in stages in fixed length frames, for discarding the supplementary information parts, which cannot be multiplexed because of a band deficiency.

High performance digitally multiplexed transmission system

The invention provides a synchronism establishing method and apparatus including a plurality of modules having different independent synchronization patterns to be switched wherein the switching transition process having a time length corresponding to the number of protection stages necessary for pull in and protection of synchronism is reduced so small that the presence of such switching transition process can be ignored while assuring similar advantages to those of conventional synchronism establishing apparatus. A master side module delivers a notification of establishment of synchronism thereof to a slave side module. When the slave side module is in a condition wherein synchronism is established, it puts its synchronizing operation into a waiting mode. Even if it thereafter detects a number of abnormal synchronization patterns greater than the number of protection stages, it does not determine a pull out condition and maintains the pulled in phase. If the slave side module detects a false pull out condition from the master side module, the slave side module determines that synchronism is entered therewith and resumes its processing operation.

Synchronism establishing method and apparatus

A packet switching system having a matrix switch including input packet transfer buses and output packet transfer buses. Transfer buffers or gates are provided at cross points of the input and output packet transfer buses. An input packet is supplied to the matrix switch through a transfer control circuit, and an output packet from the matrix switch is output through the transfer control circuit. The input packet is permitted to be applied to the matrix switch so that each of the output packet transfer buses has only one packet during one packet transfer cycle.

Packet switching system having bus matrix switch

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Kawasaki, Japan

Mitsuru Tsuboi