The University of Tokyo

Sumitomo Chemical Company, Limited

National Institute of Advanced Industrial Science and Technology

Japan Science and Technology Agency

Photonics Electronics Technology Research Association

Sugimura International Patent & Trademark Agency Bureau

Mitsuru Takenaka

Shinichi Takagi

Masahiko Hata

Masafumi Yokoyama

Hisashi Yamada

Tetsuji Yasuda

Junichi Fujikata

Noboru Fukuhara

Shigeki Takahashi

Yoshiaki Nakano

Yuji Urabe

Tomoyuki Takada

Hiroaki Matsui

Hideki Takagi

Hitoshi Tabata

Taro Itatani

Takenori Osada

Osamu Ichikawa

Satoru Nakatsuji

Noriyuki Miyata

Takeshi Aoki

Hiroyuki Ishii

Jaehoon Han

SangHyeon Kim

Younghyun Kim

Junji Yumoto

Ryo Shimano

Yusuke Horinouchi

Kimihiko Kato

Jae-Hoon Han

Masamitsu Hayashi

A photonic spin register includes: a shift register unit including a magnetic material layer having a shape extending in one direction; and a write unit configured to write spin information into a magnetic domain in the magnetic material layer by transferring information included in an optical signal that is a pulse amplitude-modulated and serial input signal, to a spin state of the magnetic domain in the magnetic material layer by means of a photocurrent corresponding to the optical signal or by irradiation with the optical signal. When a shift current flows through the shift register unit in the one direction, a domain wall is configured to move in the magnetic material layer, thereby allowing the spin information to move and be buffered in the magnetic material layer.

Photonic spin register, information writing method, and information read-out method

A tunneling field effect transistor according to an embodiment of the present invention includes: a first semiconductor layer having a first conductive type; a second semiconductor layer having a second conductive type and realizing a heterojunction with respect to the first semiconductor layer in a first region; a gate insulating layer over the second semiconductor layer in the first region; a gate electrode layer over the gate insulating layer; a first electrode layer electrically connected to the first semiconductor layer; a second electrode layer electrically connected to the second semiconductor layer; and a first insulating layer interposed between the first semiconductor layer and the second semiconductor layer in a second region adjacent to the first region toward the second electrode layer.

Tunneling field effect transistor

Provided is an optical modulator which is small in optical loss, is small in a size, and is low in required voltage and is operable to perform high-speed operation. The optical phase modulatorcomprises a rib-type waveguide structureincluding: a PN junctionwhich is formed of Si and is formed in a lateral direction on a substrate; and an SiGelayerwhich is constituted of at least one layer and is doped with an impurity to a p-type and is superposed on the PN junctionso as to be electrically connected to the PN junction. The rib-type waveguide structurehas a substantially uniform structure along a light propagation direction, and in a direction parallel with the substrate and perpendicular to the light propagation direction, a position of a junction interfaceof the PN junctionis offset from a center of the SiGelayer

Optical modulator and method for manufacturing the same

A MOS optical modulator having high modulation efficiency and a method of manufacturing the same are provided. A MOS optical modulator includes: a p-type Si layer constituting an optical waveguide; a gate insulating film provided on the optical waveguide; a gate layer provided on the gate insulating film and formed of an n-type group III-V semiconductor; a first contact portion connected to the gate layer; and a second contact portion connected to the Si layer.

Metal-oxide-semiconductor (MOS) optical modulator and method of manufacturing same

An optical phase modulatoraccording to an embodiment of this disclosure comprises a rib-type waveguide structurecomprising: a PN junctioncomprising Si and formed in a lateral direction on a substrate; and a SiGelayerthat is doped with a p-type impurity and comprises at least one layer laminated on the PN junction, so as to be electrically connected to the PN junction

Optical modulator and method of manufacturing same

There is provided a fabrication technique of a MOS structure that has a small EOT without increasing the interface trap density. More specifically, provided is a method of producing a semiconductor wafer that includes a semiconductor crystal layer, an interlayer made of an oxide, nitride, or oxynitride of a semiconductor crystal constituting the semiconductor crystal layer, and a first insulating layer made of an oxide and in which the semiconductor crystal layer, the interlayer, and the first insulating layer are arranged in the stated order. The method includes (a) forming the first insulating layer on an original semiconductor crystal layer, and (b) exposing a surface of the first insulating layer with a nitrogen plasma to nitride, oxidize, or oxynitride a part of the original semiconductor crystal layer, thereby forming the interlayer, together with the semiconductor crystal layer that is the rest of the original semiconductor crystal layer.

Method of producing semiconductor wafer, semiconductor wafer, method of producing semiconductor device and semiconductor device

A semiconductor substrate includes a substrate, an insulating layer, and a semiconductor layer. The insulating layer is over and in contact with the substrate. The insulating layer includes at least one of an amorphous metal oxide and an amorphous metal nitride. The semiconductor layer is over and in contact with the insulating layer. The semiconductor layer is formed by crystal growth.

Semiconductor substrate, field-effect transistor, integrated circuit, and method for fabricating semiconductor substrate

Provided is a semiconductor wafer including a base wafer, a first insulating layer, and a semiconductor layer. Here, the base wafer, the first insulating layer and the semiconductor layer are arranged in an order of the base wafer, the first insulating layer and the semiconductor layer, the first insulating layer is made of an amorphous metal oxide or an amorphous metal nitride, the semiconductor layer includes a first crystal layer and a second crystal layer, the first crystal layer and the second crystal layer are arranged in an order of the first crystal layer and the second crystal layer in such a manner that the first crystal layer is positioned closer to the base wafer, and the electron affinity Eof the first crystal layer is larger than the electron affinity Eof the second crystal layer.

Semiconductor wafer, field-effect transistor, method of producing semiconductor wafer, and method of producing field-effect transistor

Provided is a field-effect transistor including a gate insulating layer, a first semiconductor crystal layer in contact with the gate insulating layer, and a second semiconductor crystal layer lattice-matching or pseudo lattice-matching the first semiconductor crystal layer. Here, the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer are arranged in the order of the gate insulating layer, the first semiconductor crystal layer, and the second semiconductor crystal layer, the first semiconductor crystal layer is made of InGaAsP(0&#x3c;x1&#x2266;1, 0&#x2266;y1&#x2266;1), the second semiconductor crystal layer is made of InGaAsP(0&#x2266;x2&#x2266;1, 0&#x2266;y2&#x2266;1, y2&#x2260;y1), and the electron affinity Eof the first semiconductor crystal layer is lower than the electron affinity Eof the second semiconductor crystal layer.

Field-effect transistor, semiconductor wafer, method for producing field-effect transistor and method for producing semiconductor wafer

It is an objective of the present invention to form a favorable interface between an oxide layer and a group 3-5 compound semiconductor using a practical and simple method. Provided is a semiconductor wafer comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; and a second semiconductor layer that is formed to contact the first semiconductor layer, is a group 3-5 compound semiconductor layer that lattice matches or pseudo-lattice matches with InP, and can be selectively oxidized relative to the first semiconductor layer. Also provided is a semiconductor device comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; an oxide layer formed by selectively oxidizing, relative to the first semiconductor layer, at least a portion of a second semiconductor layer that is a group 3-5 compound formed to contact the first semiconductor layer and that lattice matches or pseudo-lattice matches with InP; and a control electrode that adds an electric field to a channel formed in the first semiconductor layer.

Semiconductor wafer, semiconductor device, and method of manufacturing a semiconductor device

The present invention provides a set-reset flip-flop operating in an all-optical manner. In this invention, a set pulse is inputted from the setting port. In doing so, only oscillation in set mode is generated at the multi-mode interference portion in a waveguide. As a result, a non-inverting output Q is obtained from the non-inverting output port. This state is then continued even if the set pulse input goes off. Next, a reset pulse is inputted to the resetting port. In doing so, at the multi-mode interference portion, oscillation of light in the set mode is halted, and oscillation in the reset mode occurs. As a result, it is possible to obtain an inverting output Q-bar from the inverting output port. This state is then continued even if the reset pulse goes off.

All-optical flip-flop

An optical waveguide isolator for use in an optical communication system is disclosed. The optical waveguide isolator comprises a semiconductive light amplifier structure including a semiconductor substrate of first conductivity type having a surface of a layer to be formed thereon, a first cladding layer of first conductivity type formed on the substrate, an active layer formed on the first cladding layer, a second cladding layer of the second conductivity type opposite to first conductivity type, formed on active layer, a first electrode formed on the surface of the semiconductor substrate opposite to the surface to be formed as a layer, and a second electrode formed on the second cladding layer; the first and the second cladding layers and the active layer form an optical waveguide in which the light wave propagates. The semiconductive light amplifier structure further comprises a light absorptive magnetic material layer having light absorption function for the light wave propagating through the optical waveguide. The magnetic material layer is magnetized so as to have the magnetic-field component in the direction which corresponds to the direction where a magnetic vector of the light wave vibrates, the waveguide structure body has a nonreciprocity optical characteristic that effective refractive index changes into the light wave to which the optical waveguide is propagated according to the magnet-optical effect of the light absorptive magnetic material layer according to the direction of propagation, by the effective refractive index change in the nonreciprocity, the attenuation of the first light wave that the optical waveguide is propagated in the first direction caused when the said waveguide is propagated, becomes small more than the attenuation of the second light wave propagated in the second direction opposite to the first direction caused when the said waveguide is propagated.

Optical waveguide isolator

Growing community of inventors

Tokyo, Japan

Mitsuru Takenaka