Fuji Electric Co., Ltd.

Osaka University

Mitsubishi Electric Corporation

National Institute of Advanced Industrial Science and Technology

Mitsuru Sometani

Manabu Takei

Heiji Watanabe

Takuji Hosoi

Takayoshi Shimura

Shinsuke Harada

Akihiro Koyama

Hidekazu Tsuchida

Koji Nakayama

Takeshi Tawara

Shinichiro Matsunaga

Yoshiyuki Yonezawa

Tomonori Mizushima

Kensuke Takenaka

Kouichi Murata

Yuji Kiuchi

A silicon carbide semiconductor device has an active region and a termination structure portion disposed outside of the active region. The silicon carbide semiconductor device includes a semiconductor substrate of a second conductivity type, a first semiconductor layer of the second conductivity type, a second semiconductor layer of a first conductivity type, first semiconductor regions of the second conductivity type, second semiconductor regions of the first conductivity type, a gate insulating film, a gate electrode, a first electrode, and a second electrode. During bipolar operation, a smaller density among an electron density and a hole density of an end of the second semiconductor layer in the termination structure portion is at most 1×10/cm.

Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device

A method for manufacturing a semiconductor device includes: thermally-oxidizing a surface of a to-be-processed base made by SiC as body material to form a silicon dioxide film, by supplying gas containing oxidation agent to the surface of the to-be-processed base; exchanging ambient gas containing the oxidation agent after forming the silicon dioxide film, by decreasing a partial pressure of the oxidation agent in the ambient gas to 10 Pa or less; and after exchanging the ambient gas, lowering a temperature of the to-be-processed base.

Method for manufacturing semiconductor device and semiconductor manufacturing apparatus used for the method

A method of evaluating a semiconductor device having an insulated gate formed of a metal-oxide film semiconductor. The semiconductor device has a high potential side and a low potential side, and a threshold voltage that is a minimum voltage for forming a conducting path between the high and low potential sides. The method includes determining a variation of the threshold voltage at turn-on of the semiconductor device by continuously applying an alternating current (AC) voltage to the gate of the semiconductor device, a maximum voltage of the AC voltage being equal to or higher than the threshold voltage of the semiconductor device.

Method of evaluating semiconductor device and apparatus for evaluating semiconductor device

A p-type base region, n-type source region, p-type contact region, and n-type JFET region are formed on a front surface side of a silicon carbide base by ion implantation. The front surface of the silicon carbide base is thermally oxidized, forming a thermal oxide film. Activation annealing at a high temperature of 1500 degrees C. or higher is performed with the front surface of the silicon carbide base being covered by the thermal oxide film. The activation annealing is performed in a gas atmosphere that includes oxygen at a partial pressure from 0.01 atm to 1 atm and therefore, the thermal oxide film thickness may be maintained or increased without a decrease thereof. The thermal oxide film is used as a gate insulating film and thereafter, a poly-silicon layer that is to become a gate electrode is deposited on the thermal oxide film, forming a MOS gate structure.

Method of manufacturing silicon carbide semiconductor device

Growing community of inventors

Tsukuba, Japan

Mitsuru Sometani