Hitachi, Ltd.

Hitachi Instruments Engineering Co., Ltd.

Mitsuo Ito

Isao Yoshida

Junkichi Miura

Takeaki Okabe

Kazutoshi Ashikawa

Masahito Ito

Tetsuo Iijima

Kenji Yasuda

Yoshio Sakai

Toshiaki Masuhara

Osamu Minato

Minoru Nagata

Hideaki Kato

Yoshio Fujii

Yoshinori Takata

Mineo Katsueda

Hiroshi Satake

Shigeo Ohtaka

Fuminori Umesato, Deceased

A chromatograph system with improved automation is provided. In the chromatograph system of one embodiment, a regression line is set between retention times of predetermined peaks measured at each run in the past for a standard sample having known components. Referring to this regression line, the peak identifying condition, i.e., time window, is corrected. In another embodiment, there is provided a chromatograph apparatus having a function of estimating a limited life time of a system component. The analyzed results of the chromatograph system can thus be improved.

Chromatograph system and method of use

Deterioration of performance of a separation column for liquid chromatograph due to changes in the functional groups during the preservation or application is prevented by filling a solution containing a component in the molecule with the same structure as that of the chemical function group of a packing material for the separation column as a filling liquid together with the packing material in the separation column, and also by washing the separation column with the same filling liquid as a washing solution after the analysis and retaining the washing solution therein, whereby the preservation stability of the separation column is improved and the separation column can be preserved at room temperature.

Separation column containing S-carboxyalkylcysteine

An insulated gate semiconductor device contains a protective element for protecting the gate electrode of an insulated gate field effect transistor. The protective element is formed of the same semiconductor layer as that of the gate electrode of the insulated gate field effect transistor and is formed integrally with the gate electrode on an insulating film formed on the surface of a semiconductor substrate.

Insulated gate semiconductor device with back-to-back diodes

Desired components can be simply and economically separated and recovered from a sample solution having a complicated composition through a liquid chromatography by passing the sample solution through a separation column, thereby separating components contained therein in the separation column, then selectively passing the eluate from the separation column through a trapping column according to a desired component, thereby trapping the desired component in the trapping column, while discarding or recycling the effluent eluate from the trapping column, and then passing another eluting solution composed of a volatile substance when dried under reduced pressure through the trapping column, thereby recovering eluate containing the desired component from the trapping column.

Liquid chromatography and apparatus using the same

A method for fabrication a vertical MOSFET which contains a protective element for protecting the gate electrode of an insulated gate field effect transistor. The protective element is formed of the same semiconductor layer as that of the gate electrode of the insulated gate field effect transistor and is formed integrally with the gate electrode on an insulating film formed on the surface of a semiconductor substrate.

Method for fabricating vertical MOSFETs

A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n.sup.+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n.sup.+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.

DMOS With gate protection diode formed over base region

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Ibaraki, Japan

Mitsuo Ito