Matsushita Electric Industrial Co., Ltd.

Nippon Hoso' Kyokai

Mitsuo Isobe

Yuichi Ninomiya

Masanori Hamada

Katsumi Morita

Yoshimichi Ohtsuka

Yoshinori Izumi

Hiromu Kitaura

Susumu Tsujihara

Hiroshi Taniguchi

Isao Kawahara

Seiichi Gohshi

Namio Yamaguchi

Ikunori Inoue

Yoshio Seki

Toshihide Tanaka

Yoshio Hirauchi

Noboru Yasumatsuya

Tetsuo Kutsuki

Takeshi Inoue

Hiroyosi Shimosaka

A visual image signal processing apparatus includes: an overlaying unit for overlaying a brightness reference signal at a predetermined position in a fly-back period of an input visual image signal; a first clamping unit for clamping an output from the overlaying unit at a predetermined clamping voltage; a detecting unit for applying an output from the first clamping unit to a driving electrode of a cathode ray tube and for detecting a beam current flowing based on the brightness reference signal overlaid in the input visual image signal; and a second clamping unit for controlling the predetermined clamp voltage based on the beam current detected by the detecting unit.

Visual image signal processing apparatus using arithmetic operation on

A cathode ray tube control apparatus includes phosphor display screen, three electron guns for emitting R, G, B electron beams to the display screen, a shadow mask placed between the electron guns and the display screen, and index phosphors deposited on the shadow mask and having at least two line elements diagonal to a horizontal scanning direction of the electron beam for generating a signal according to the electron beam scan. Further provided are detector for detecting beam crossing points over the index phosphor, and correction circuit for correcting the deflection of the electron beam based on the detected beam crossing points.

Cathode ray tube control apparatus

A subsample signal processing apparatus includes a wide-band D/A converter receiving a digital television signal which is compressed in band by subsampling. A signal processor subjects a video signal portion of an output signal from the D/A converter to wide-band processing. The signal processor subjects a sync signal portion of the output signal from the D/A converter to narrow-band processing. An output terminal of the signal processor and an input terminal of a subsequent A/D converter are coupled with wide-band coupling characteristics.

Subsample television signal processing apparatus

A picture signal processing apparatus of a TV set, which has a picture signal memory/processing circuit to which picture signals are inputted. This picture signal memory/processing circuit includes a frame memory and has two alternative functions. One of the functions is to apply LPF processing in a temporal domain to a high frequency signal component, and the other function is to take out and output a still picture signal from the picture signal.

Picture signal processing apparatus having a temporal filter and a

A television receiver is provided with two field memories for storing movement control signals, an OR circuit, a frame memory for storing the present and previous fields, a pair of switches controlled by a freeze signal, a switch controlled by the output signal of the OR circuit, and another switch for changing over its output signal to and from the output signal from the switch controlled by the OR circuit and the signal from the frame memory representing the present field. One frame's worth of video signals of the present field and the previous field are stored in the frame memory by a freeze signal. The signals stored in the frame memory provide a freeze picture having no multi-line dimness by virtue of using the present field and the previous field for the still picture image portion and the present field for the moving picture image portions of the present field and the previous field.

Television receiver

A clamp system for television signal comprises a first clamp device for clamping to a clamp control voltage supplied from an external source by a horizontal clamp pulse and a second clamp device for controlling the DC potential of the television signal by adding the externally-supplied control voltage to an input television signal. The first clamp device is used during the period requiring an early clamp start, and the second clamp device is operated under normal conditions.

Clamp system used for television signal

An image signal processing apparatus is provided which is applicable to a motion adaptive Y/C separation of an NTSC signal and a time-domain/spatial interpolation of a high definition television signal band-compressed by sub-Nyquist sub-sampling. The apparatus includes a still image processing circuit having frame memories, a motion image processing circuit having a line memory, a mixing circuit for mixing outputs of these processing circuits, a circuit for detecting image motion of an input image signal and applying a resultant control signal to the mixing circuit, and a signal mode control circuit for selectively adapting the image processing circuits for the processing of the NTSC signal or the high definition television signal. The motion detecting circuit includes a narrow band detecting circuit for producing a one-frame interval difference signal of a signal spectrum of a pure low frequency component from the NTSC signal or the high definition television signal respectively, a wide band detecting circuit for a two-frame interval difference signal and a composition circuit for composing outputs of these detecting circuits. The still image processing circuit, motion image processing circuit and mixing circuit are adapted to operate for the Y/C separation with the NTSC signal and for the interpolation of the high definition television signal, respectively.

Image signal processing apparatus for Y/C separation and for time

A television signal receiving apparatus of the type in which when performing a picture in picture operation by receiving a plurality of picture signals compressed in band width by multiple sub-Nyquist sampling, a sub-channel signal is first subjected to a spatial interpolating process and combined with a main-channel signal. The still picture portion and moving picture portion of a first input signal are restored to a field offset sub-sampled first picture signal, and a second input signal is restored to a field offset sub-sampled picture signal, subjected to a size-reducing process by time base compression in the vertical and horizontal directions of the picture and delivered as a second picture signal of the form synchronized in phase with a given position of the first picture signal. The first and second picture signals are time-division multiplexed to deliver a third picture signal onto a picture screen.

High definition television receiver enabling picture-in picture display

Disclosed is an automatic gain control device which comprises: a first amplitude detection circuit for detecting an average amplitude value of a television video signal, a peak amplitude value of the same television video signal, or a value obtained by mixing the average amplitude value and the peak amplitude value with a predetermined mixing ratio; a second amplitude detection circuit for detecting an amplitude value of a vertical or horizontal synchronizing signal in the television video signal; an amplitude control circuit for controlling an amplitude of an input television video signal; a synchronization circuit for detecting a vertical synchronizing signal and a horizontal synchronizing signal in the television video signal so as to generate various pulses including a clock pulse synchronized with the input television video signal by controlling an oscillation frequency of an oscillation circuit; and a synchronization phase lock detection circuit for detecting whether the synchronization circuit has been pulled into synchronism with the input television video signal, so that the amplitude control circuit is controlled by an output of the second amplitude detection circuit when synchronization phase-lock is established while controlled by an output of the first amplitude detection circuit when the synchronization phase-lock comes out.

Automatic gain control device

When the receiving system for a band-compression image signal receives a dropout signal representing a dropout portion of an image signal, an output of the third delay circuit of the temporal filter for motion detection processing, that is, motion information of an image signal, which precedes by one field, and a dropout signal activate the signal selection control circuit to produce an output signal for controlling the operation of the signal selection circuit, so that an output signal of the first delay circuit is selected for a static portion of an image, and an output signal of the dropout compensation circuit is selected for a moving portion of an image, so as to effect compensation control of the dropout portion of an image signal, thereby preventing deterioration of the quality of an image.

Receiving system for band-compression image signal

In a synchronous video detector circuit using a phase-locked loop, the synchronous detection of a video IF signal is effected with a synchronous carrier signal reproduced by the PLL including a voltage-controlled oscillator. Each of a phase comparator of the PLL and a synchronous video detector has its input terminal connected to an output terminal of a video IF amplifier by untuned coupling, and arranged on the output side of the synchronous video detector is a phase-locked mode detector for detecting that the PLL is in its phase-locked mode. The phase-locked mode detector is adapted to control the band width of a low-pass filter of the PLL in either a narrow band mode or a wide band mode and the low-pass filter is controlled to operate in the narrow band mode only when the PLL is in the phase-locked mode of operation. The black and white noise included in the output signal of the synchronous video detector are both cancelled by a noise cancellation circuit including a black noise detector for pulse noise cancellation purposes.

Synchronous video detector circuit using phase-locked loop

An AGC circuit includes an amplitude synchronous detector using a phase-locked loop (PLL), a variable gain amplifier for supplying a signal to this detector, and a means for controlling the amplification degree of the amplifier to make the output signal level constant. More specifically, the AGC circuit includes a first AGC loop including an AGC detector and a low-pass filter provided before the AGC detector, a second AGC loop including a synchronous detector and a phase synchronized state detecting circuit DC coupled to the output end of the synchronous detector, the output signal from the phase synchronized state detecting circuit being used to control the AGC circuit, and a noise eliminating circuit provided at the final stage for adding the output signal from the phase synchronized state detecting circuit and the output signal from the synchronous detector, or for performing subtraction between both the signals.

Automatic gain control circuit

An RF-IF signal receiving circuit of a television receiver controls a tuner which receives an amplitude modulated RF signal and converts it to an IF signal and an IF signal carrier generator for demodulating the amplitude modulated signal from the IF signal by synchronous detection, using a phase synchronous loop. A sweep voltage generator of a voltage-controlled oscillator in the phase synchronous loop comprises an envelope detector which is DC-coupled to an output of an amplitude synchronous detector and a low pass filter in order to enhance the pull-in range of the phase synchronous loop.

Phase synchronizing arrangement for video synchronous detection

A constant voltage converter for use with a cathode ray tube in which a voltage regulator is controlled by both the output of the regulator and beam current from the cathode ray tube by way of beam detecting means. The output of the regulator is applied separately to a stabilizing circuit including another feedback circuit for CRT, and also to deflection circuits so as to better prevent fluctuation of picture on the CRT.

Growing community of inventors

Osaka, Japan

Mitsuo Isobe