Shindengen Electric Manufacturing Company Limited

Mitsugu Tanaka

Shinji Kunori

Masaru Wakatabe

Akira Sugiyama

Takashi Kan

A semiconductor rectifier having a high breakdown voltage and a high speed operation is provided, which comprises a semiconductor substrate including a first semiconductor layer of one conductivity type and a second semiconductor layer of one conductivity type provided on the first semiconductor layer, a third semiconductor layer of an opposite conductivity type having a depth D and formed in the second semiconductor layer to provide a pn junction therebetween, the third semiconductor layer defining a plurality of exposed regions of the second semiconductor layer, each of the plurality of exposed regions of the second semiconductor layer having a width W, a relation between the depth D and the width W being given by D.gtoreq.0.5W, and a metal electrode provided on the substrate surface.

Semiconductor rectifier having high breakdown voltage and high speed

A semiconductor rectifier having a high breakdown voltage and a high speed operation is provided, which includes a semiconductor substrate having an N.sup.+ -type semiconductor layer and an N-type semiconductor layer, a P.sup.+ -type semiconductor layer formed in the N-type semiconductor layer to provide a PN junction therebetween, the P.sup.+ -type semiconductor layer defining exposed regions of the N-type semiconductor layer, and a metal layer provided on an entire surface of the semiconductor substrate having the P.sup.+ -type semiconductor layer to provide contact surfaces of Schottky barrier between the metal layer and each of the exposed regions of the N-type semiconductor layer. In the structure, a configuration of the PN junction is provided to satisfy conditions given by 0.degree.&lt;.theta..ltoreq.135.degree. and 3Wbi.ltoreq.W.ltoreq.2W.sub.B where .theta. is an angle between one of the contact surfaces and a tangent line passing through a point f on the PN junction through which a straight line passes from a top of a built-in depletion layer in parallel with each of the contact surfaces and where W.sub.bi is a thickness of the built-in depletion layer extending to the N-type semiconductor layer at zero bias voltage, W is a width of each of the contact surfaces and W.sub.B is a thickness of a depletion layer at breakdown of the pn junction, respectively.

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Saitama, Japan

Mitsugu Tanaka