Meiko Electronics Co., Ltd.

Mitsuaki Toda

Tohru Matsumoto

Yoshio Imamura

Ryoichi Shimizu

Takuya Hasegawa

Tomoyuki Nagata

Tatsuya Kikuchi

Seiko Murata

Masaru Ogasawara

Mitsuo Iwamoto

Yasuaki Seki

Akira Yamaki

In a method for manufacturing a device embedded substrate, a conductive via that penetrates a first insulating layer and a second insulating layer from an outer metal layer to reach a second terminal of an IC device is formed after forming the outer metal layer.

Method for manufacturing device embedded substrate, and device embedded substrate

A device embedded substrate (), includes: an insulation layer () including an insulation resin material; an electric or electronic device () embedded in the insulation layer (); a terminal () serving as an electrode included in the device (); a conductor pattern () formed on the surface of the insulation layer (); and a conducting via () for electrically connecting the conductor pattern () and the terminals () with each other. The conducting via () is made up of a large-diameter section () having a large diameter and a small-diameter section () having a smaller diameter than that of the large-diameter section (), in order starting from the conductor pattern () toward the terminal (). A stepped section () is formed between the large-diameter section () and the small-diameter section (). The large-diameter section () is formed so as to penetrate a sheet-shaped glass cloth () disposed in the insulation layer ().

Device embedded substrate and manufacturing method of device embedded substrate

In a mark forming step in a manufacturing method for a component incorporated substrate in which an electronic component is positioned with reference to a mark formed in a copper layer, when an imaginary line extending from a search center of a search range of a sensor, to an edge side of the search range is represented as a search reference line and an imaginary line extending, in a state in which a mark center, is matched with the search center, from the mark center in the same direction as the search reference line to an outer ridgeline of the mark is represented as a mark reference line, the mark formed in a shape in which the outer ridgeline of the mark is present in a position where a length of the mark reference line is in a range of 30% or more of the search reference line.

Manufacturing method for component incorporated substrate and component incorporated substrate

A manufacturing method for a component incorporated substrate according to the present invention includes positioning an electronic component with reference to a mark formed on a copper layer, the mark consisting of a material less easily etched than copper by a copper etching agent used for etching of copper, after mounting the electronic component on the copper layer with an adhesive layer interposed therebetween, embedding the electronic component and the mark in an insulating substrate, thereafter, etching and removing a part of the copper layer to form a window for exposing the mark, forming an LVH reaching a terminal of the electronic component with reference to the exposed mark, electrically connecting the terminal and the copper layer via a conduction via formed by applying copper plating to the LVH, and, thereafter, forming the copper layer into a wiring pattern.

Manufacturing method for component incorporated substrate and component incorporated substrate manufactured using the method

The present invention provides a manufacturing method of a device embedded substrate, including: forming a bonding layer of an insulation material on a metal layer formed on a support plate; and mounting an electric or electronic device on the bonding layer, wherein the device is formed of a device main body and a protruding terminal; the bonding layer includes a first bonding body bonded with the metal layer and a second bonding body bonded with the device; the first bonding body is formed along the outer edge of the device; the second bonding body is formed in an area equal or smaller than the area defined by the outer edge of the terminal; and, in the bonding layer forming step, the second bonding body is formed on the first bonding body after the first bonding body is cured.

Manufacturing method of device embedded substrate and device embedded substrate manufactured by this method

A component-embedded substrate includes an electrically insulating base () of resin, an electric or electronic embedded component () and a dummy embedded component () both embedded in the insulating base (), a conductor pattern () formed on at least one side of the insulating base () and connected directly to or indirectly via a connection layer () to the embedded component () and the dummy embedded component (), and a mark () formed on a surface of the dummy embedded component () and used as a reference when the conductor pattern () is formed, whereby positional accuracy of the conductor pattern () relative to the embedded component () can be improved.

Growing community of inventors

Ayase, Japan

Mitsuaki Toda