Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Mitsuaki Nakao

Takeshi Iseki

Shuji Ariga

An object of the present disclosure is to provide a chip resistor that reduces a possibility of occurrence of a mounting failure. The chip resistor of the present disclosure includes: insulating substrate; a pair of first upper-face electrodes that is provided at both end portions of an upper face of insulating substrate; and resistor that is provided on the upper face of insulating substrate and is formed between the pair of first upper-face electrodes. The chip resistor also includes: a pair of second upper-face electrodes that is formed on upper faces of the pair of first upper-face electrodes and is connected to resistor; and protective film that is provided to cover exposed resistor and part of the pair of second upper-face electrodes.

Chip resistor

A chip resistor includes: a pair of upper surface electrodes formed at opposing side portions of a rectangular substrate as opposed to each other with respect to a center line of the rectangular substrate extending in a direction connecting the side portions; a resistive element formed on the rectangular substrate to be electrically connected with the upper surface electrode pair; and a pair of end surface electrodes formed on end surfaces of the opposing side portions of the rectangular substrate and electrically connected with the upper surface electrode pair. The chip resistor further includes dummy electrodes formed individually at the opposing side portions of the rectangular substrate at positions corresponding to the upper surface electrode pair in the direction connecting the side portions.

Growing community of inventors

Fukui, Japan

Mitsuaki Nakao