Fuji Electric Co., Ltd.

Fuji Electric Device Technology Co., Ltd.

Fuji Electronic Co., Ltd.

Mitsuaki Kirisawa

Masahito Otsuki

Takashi Yoshimura

Haruo Nakazawa

Michio Nemoto

Seiji Momota

Kenji Okamoto

Tatsuya Naito

Tomoyuki Kawashima

Kazuo Shimoyama

Kazuhiko Imamura

Tadayoshi Ishii

In aspects of the invention, an n-type epitaxial layer that forms an ntype drift layer is formed on the upper surface of an n-type semiconductor substrate formed by being doped with a high concentration of antimony. A p-type anode layer is formed on a surface of the ntype drift layer. An n-type contact layer is formed with an impurity concentration in the same region as the impurity concentration of the n-type cathode layer, or higher than the impurity concentration of the n-type cathode layer, on the lower surface of the n-type cathode layer. A cathode electrode is formed so as to be in contact with the n-type contact layer. The n-type contact layer is doped with phosphorus and, without allowing complete recrystallization using a low temperature heat treatment of 500&#xb0; C. or less, lattice defects are allowed to remain.

Semiconductor device and semiconductor device manufacturing method

The method of manufacturing a semiconductor device includes forming a p-type anode layer and an anode electrode on one major surface of an n-type semiconductor substrate, irradiating an electron beam to the semiconductor substrate to introduce crystal defects into the semiconductor substrate, grinding the other major surface of semiconductor substrate to reduce the thickness the semiconductor substrate, implanting phosphorus ions from the exposed surface of semiconductor substrate, and irradiating pulsed YAG laser beams by the double pulse technique to the exposed surface, from which the phosphorus ions have been implanted, to activate the implanted phosphorus atoms and to recover the region extending from the exposed surface irradiated with the YAG laser beams to the depth corresponding to 5 to 30% of the total wafer thickness from the defective state caused by the crystal defects introduced therein.

Method of manufacturing semiconductor device and semiconductor device formed by the method

A method for stably activating pn-successive layers in a semiconductor element in a short time is disclosed. Pulsed beams, each of which has a pulse shape that is approximately rectangular, are projected from respective laser irradiation devices and successively combined into a pulsed beam equivalent to one pulse, with which the doped layer region is irradiated. By successively projecting the pulsed beams onto the doped layer region in this way, an effect is obtained which is the same as that of irradiating the doped layer region with a single pulsed beam having a long full-width at half maximum. A high activation ratio from a shallow region to a deep region of the doped layer region is enabled. This can stably activate the semiconductor element having the pn-successive layers as the doped layer region in a short time, making possible the manufacture of semiconductor elements having superior device characteristics.

Method of manufacturing semiconductor element

A high-speed, soft-recovery semiconductor device that reduces leakage current by increasing the Schottky ratio of Schottky contacts to pn junctions. In one embodiment of the present invention, an n drift layer is formed on an n cathode layer by epitaxial growth, and ring-shaped ring trenches having a prescribed width are formed in the n drift layer. Oxide films are formed on the side walls of each ring trench. The ring trenches are arranged such that the centers of the rings of the ring trenches adjacent to one another form a triangular lattice unit. A p anode layer is formed at the bottom of each ring trench. Schottky contacts are formed at the interface between an anode electrode and the surface of the n drift layer. Ohmic contact is established between the surfaces of polysilicon portions and the anode electrode.

Power semiconductor rectifier with ring-shaped trenches

A semiconductor device constituting an IGBT exhibits low losses yet can be manufactured using an inexpensive wafer and with high yields, and exhibits low losses. The IGBT is produced by using a wafer, for example an FZ wafer, that is cut form an ingot and has its surface polished and cleaned, wherein an n-type impurity diffusion layer having an enough dose to stop the electric field in turn-off is provided between a collector layer and a base layer as a field-stop layer for stopping an electric field in turn-off. The thickness of this field-stop layer defined by Xfs&minus;Xj is controlled in the range from 0.5 &mgr;m to 3 &mgr;m, where Xfs is the position at which the impurity concentration in the field-stop layer is twice the impurity concentration of the base layer, and Xj is the position of the junction between the filed-stopping layer and the collector layer.

Semiconductor device

A method for manufacturing a semiconductor device constituting an JGHT is provided that allows to manufacture the device using an inexpensive wafer and with high yields, and achieves low losses. Specifically, after an emitter electrode is formed, a reverse principal surface is polished to a specified thickness. The center line average height Ra of the polished surface is controlled to be not more than 1 &mgr;m, and the filtered center line waviness Wca is kept within 10 &mgr;m. The polished surface is selectively cleaned with an aqueous chemical solution to remove particles. To the cleaned surface, phosphorus ions arc implanted for forming a field-stop layer and boron ions are implanted for forming a collector layer. The wafer is then put into a diffusion furnace and annealed at a temperature from 300&deg; C. to 550&deg; C. to form a field-stop layer and a collector layer. Finally, a collector electrode is formed.

Method of fabricating a semiconductor device with phosphorous and boron ion implantation, and by annealing to control impurity concentration thereof

In a semiconductor device having a laminated metal layer in which a metal layer whose main component is aluminum and a metal layer whose main component is nickel are laminated on each other, the ratio (t,/t,) of the thickness (t,) of the metal layer whose main component is aluminum to that (t,) of the metal layer whose main component is nickel is controlled to 5 or larger, so that part of the metal layer whose main component is aluminum remains even if an Al&mdash;Ni intermetallic compound is formed.

Growing community of inventors

Nagano, Japan

Mitsuaki Kirisawa