Sumitomo Electric Industries, Limited

Mitsuaki Fujihira

Masanori Nishiguchi

Yoshiaki Tanaka

Takeshi Sekiguchi

Atsushi Miki

Hideaki Nishizawa

A semiconductor device includes a lower conductive member, an upper conductive member and a conductive wire. The one end of the conductive wire is electrically connected to a semiconductor chip. The lower conductive member is formed on a lead frame. The conductive wire is sandwiched between the lower conductive member and the upper conductive member located thereon and is electrically connected to the lead frame. A connecting portion of the conductive wire connected to the lead frame is sandwiched between the lower and upper conductive members so that the neck portion of the conductive wire can be protected from above.

Semiconductor device and method for manufacturing the same

A method of manufacturing a semiconductor device having a package including a base, and a chip mounted on the base, wherein the chip has a surface on which an element is formed, the method comprising the steps of (a) fixing the chip having a protective coat formed on the surface to the base; and (b) removing the protective coat from the chip without touching the chip.

Method of manufacturing semiconductor device

Method of measuring junction temperature

An integrated circuit device having an electronic circuit component connected by wire-bonding is characterized in that a masking member having a lower sputtering rate than that of the material forming the electrodes to be used for the wire-bonding is arranged around the electronic circuit component. A method for manufacturing an integrated circuit device having an electronic circuit component connected by wire-bonding is characterized in that a masking member having a lower sputtering rate than that of the material forming the electrodes to be used for the wire-bonding is arranged around the electronic circuit component.

Integrated circuit device and method for manufacturing the same

The present invention relates to a method of making a compound semiconductor device having a high performance self-aligned LDD structure which has stable characteristics, and is suitable for high integration and high yield, in which after forming a channel layer beneath the substrate surface, using a high performed self-aligned technology, a gate electrode, lightly doped layers and heavily doped layers are formed in predetermined positions by a photolithography for the gate portion. This process of a photolithography is performed only once, therefore, each pattern can be formed with excellent accuracy and reproducibility.

Production methods for compound semiconductor device having lightly

A compound semiconductor device in which a source and drain regions are formed on both sides of a groove defined in a substrate and both regions are separated from the side walls of the groove by predetermined intervals through a first region with a depth shallower than the groove. A second region is formed between the source and drain region with a depth deeper than said groove. A gate electrode is formed on the surface of the second region in the groove for Schottky contacting with the upper surface of the second region. There is further disclosed a method of making a fine mask pattern suitable for making the compound semiconductor mentioned above.

Field effect transistor having Schottky contact and a high frequency

A process of die-bonding a semiconductor chip. The semiconductor chip is sucked by a collet and fixed on a preform which is formed on a die pad. A load is applied to the chip and a gas is blown around the semiconductor chip. so as to flatten any of the preform that has gone beyond the interface between the chip and die pad. The entire assembly is heated thereby curing the preform. In a preferred embodiment the semiconductor chip is sucked with the collet via a vacuum pump and an inert gas is blown around the semiconductor chip.

Growing community of inventors

Yokohama, Japan

Mitsuaki Fujihira