Freescale Semiconductor,inc.

Mitchell T Lien

Mark A Durlam

Loren J Wise

Thomas V Meixner

Gloria J Kerszykowski

Li Hsin Chang

Magnetoelectronic memory element structures and methods for making such structures using a barrier layer as a material removal stop layer are provided. The methods comprise forming a digit line disposed at least partially within a dielectric layer. The dielectric material layer overlies an interconnect stack. A void space is etched in the dielectric layer to expose the interconnect stack. A conductive-barrier layer having a first portion and a second portion is deposited. The first portion overlies the digit line and the second portion is disposed within the void space and in electrical communication with the interconnect stack. A memory element layer is formed overlying the first portion and an electrode layer is deposited overlying the memory element layer. The electrode layer and the memory element layer are then patterned and etched.

Magnetoresistive random access memory device structures and methods for fabricating the same

A magnetoresistive random access memory (MRAM) is embedded with another circuit type. Logic, such as a processing unit, is particularly well-suited circuit type for embedding with MRAM. The embedding is made more efficient by using a metal layer that is used as part of the interconnect for the other circuit also as part of the MRAM cell. The MRAM cells are all written by program lines, which are the two lines that cross to define a cell to be written. Thus, the design is simplified because there is commonality of usage of the metal line that is used for one of the program lines for the MRAM and for one of the interconnect lines for the logic.

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Gilbert, AZ, United States of America

Mitchell T Lien