Matsushita Electric Industrial Co., Ltd.

Misao Kato

Yoshinori Amano

Yasuharu Shimeki

Hiroshi Matsushima

Yoshio Hirauchi

Mari Kimura

Nobuyoshi Kihara

Shiro Tsuji

Kunihiko Hontani

Toshiro Ishikawa

Kousou Takeuchi

An image processor produces a cross-faded image from first and second image data and first and second control data. The cross-faded image corresponds to a product of the first image data and the first control data and a product of the second image data and the second control data. The image processor includes a first address generator which generates a first l-bit address signal made up of the upper (n-k.sub.1) bits of the first n-bit image data and the upper (m-k.sub.2) bits of the first m-bit control data. Similarly, a second address generator is provided which generates a second l-bit address signal made up of the upper (n-k.sub.1) bits of the second n-bit image data and the upper (m-k.sub.2) bits of the second m-bit control data. The number of bits l of each address signal is less than a sum of the bits n and m of each of the image data and control data. The first and second address signals are used to access a ROM which is used to generate corresponding first and second product data. The product data is summed to generate cross-faded image data.

Image processor for producing cross-faded image from first and second

A picture file system including a recording medium having a picture zone and a reduced picture zone divided therein. In a picture recording mode, a full-size picture data is recorded in the picture zone and a reduced picture of a predetermined data size corresponding to the full-size picture is recorded at a predetermined address in the reduced picture zone. In a picture retrieval mode, a plurality of the reduced pictures of the predetermined data size recorded at their predetermined addresses in the reduced picture zone are sequentially reproduced and displayed at the same time.

Picture file system

In an optical disc device including an optical disc, a device for selectively processing and recording on the optical disc analog and digital input signals includes analog modulation circuitry for receiving analog input signals and producing modulated analog output signals, block forming circuitry for receiving digital input signals, partitioning the digital input signals into sectors containing sector data, adding error code data to each sector, and producing sector data signals, and digital modulation circuitry for receiving the sector data signals, digitally modulating the sector data signals to suppress low-frequency components, encoding the sector data signals, and producing encoded modulated digital output signals. Selection circuitry receives an external signal indicative of whether the input signals are analog or digital input signals, selects one of the modulated analog output signals and the encoded modulated digital output signals based on the external signal, and produces a selection signal indicating which of the output signals is selected. Recording circuitry receives and amplifies the output signal selected by the selection circuitry, receives the selection signal from the selection circuitry, filters the amplified signal based on the selection signal, and records the amplified filtered signal on the optical disc.

Apparatus for selectively recording analog and digital data on an

A method of encoding and decoding binary data, comprising the steps of: dividing the binary data into 2-bit data groups, converting each 2-bit data group into a 5-bit code having a minimum of 4 consecutive bits '0' between a bit '1' and the next bit '1', and converting reversely the encoded 5-bit codes into the original binary data with reference to another 5-bit codes located forwardly of and rearwardly of the 5-bit code. By employing this method, it becomes possible to obtain a density twice higher than that of 'MFM' method.

Method of encoding and decoding binary data

A method is disclosed for processing binary data prior to magnetic recording. The binary data is divided into 4-bit data segments which are converted to 8-bit codes according to a predetermined encoding transfer function describing the relationships between the 4-bit data segments and corresponding 8-bit codes, wherein the bit pattern of each 8-bit code has an intra-code run-length of at least two '0' bits and forms an inter-code run-length of from at least two '0' bits to at most nine '0'bits with an adjacent 8-bit code. The method further includes the step of generating a frame synchronization code and interleaving it with 8-bit codes to form a frame of binary digits. The frame sync code has a bit pattern which is unduplicatable by any combination of 8-bit codes that follow.

Method and apparatus for processing binary data

In a magnetic recording/reproducing apparatus having a multi-track head for writing a digital signal on a magnetic recording medium, a plurality of head of the multi-track head is electrically divided into a plurality of groups which are respectively driven by writing currents produced in accordance with a plurality of modulated signals indicative of input digital data. The writing currents fed to the heads of the same group are produced in response to a pulse signal such that a plurality of pulse signals having different phases are used for respective groups. The head in the same group are positioned so that they are not adjacent to each other, and therefore, undesirable crosstalk can be reduced because heads corresponding to adjacent tracks are prevented from being driven simultaneously, while the entire writing current power can be reduced. The waveform of each of the writing currents may be controlled in accordance with the period of level inversion of the modulated signals, and therefore, peak shift phenomena due to waveform interference can be reduced.

Circuit arrangement and method for magnetic recording/reproducing

Source data is organized by a time compression memory (4) into a plurality of successive groups of data words arranged in a pattern of rows and columns with the rows corresponding to respective recording tracks. A plurality of successive groups of parity check words is provided in the same pattern of rows and columns as the data words subsequent to the data word groups. Each parity check word is derived in a parity generator (6) by modulo-2 summations from the data words selected from different data word groups. The data and check words of each row of each respective group are (a) preceded by a synchronization code provided by a sync generator (10) to allow differentiation between data and parity groups, and (b) followed by a cyclic redundancy check, (CRC) code provided by a CRCC generator (9) to allow detection of an error in that data row or check words. The parity check word is used to correct an error specified by the CRC code upon detection of an error.

Growing community of inventors

Katano, Japan

Misao Kato