Qimonda Ag

Qimonda Flash Gmbh & Co. Kg

Mirko Reissmann

Detlev Richter

Girolamo Gallo

Konrad Seidel

Andreas Kux

Gert Koebernik

Uwe Augustin

Volker Zipprich-Rasch

Ramirez Xavier Veredas

Roberto Ravasio

Gert Köbernik

Hans Heitzer

Daniel-André Löhr

Sören Irmer

Embodiments of the invention relate generally to an integrated circuit having a memory cell arrangement and a method for reading a memory cell state using a plurality of partial readings. In an embodiment of the invention, an integrated circuit having a memory cell arrangement is provided. The memory cell arrangement may include at least one memory cell, the memory cell being capable of storing a plurality of memory cell states being distinguishable by a predefined number of memory cell threshold values, and a controller configured to read a memory cell state of the at least one memory cell using a number of reference levels that is higher than the predefined number of memory cell threshold values, wherein the reading includes a first partial reading using a first set of a plurality of reference levels and a second partial reading using a second set of a plurality of reference levels, wherein the second set of a plurality of reference levels includes at least one reference level which is different from the reference levels of the first set of a plurality of reference levels.

Integrated circuit having a memory cell arrangement and method for reading a memory cell state using a plurality of partial readings

A memory device is provided including memory cells that are capable of switching between at least two states, where the threshold of a sense signal for detecting the current state depends on a data content of the memory cell. Parallel to a user data block, a primary control word including a predetermined number of bits of a first state is stored in a check section of the cell array. The check section is read by applying sense signals of different amplitudes, where in each case a secondary control word is obtained. By checking in each secondary control word the number of bits of the first state, the margins of the current sense signal amplitude towards the sense window limits may be checked and the sense signal amplitude may be adapted permanently to a sense window drift, so as to enhance the reliability of the memory device.

Memory device with adaptive sense unit and method of reading a cell array

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Ottendorf-Okrilla, Germany

Mirko Reissmann