General Electric Company

Miran Milkovic

Jyh-Ping Hwang

Walter J Butler

Sharbel E Noujaim

Wen-Tai Lin

David R Regenold

Anthony P Bogacki

A switched-capacitance amplifier has a common terminal and an input signal terminal for receiving an input signal voltage therebetween, and it has an inverted output signal terminal for supplying, during each of a second series of separated time intervals interleaved without overlap with a first series of separated time intervals, an output voltage that is the negative of its input signal voltage. The switched-capacitance amplifier includes first and second capacitors. The switched-capacitance amplifier also includes a differential-input amplifier, having an output connection to the inverted output signal terminal, having a non-inverting input connection to the common terminal, having an inverting input connection, and having an input port between its non-inverting and inverting input connections. During each of the first series of separated time intervals the first and second plates of the first capacitor are respectively connected to the common terminal and to the input signal terminal, for charging the first capacitor to the input signal voltage; and the first and second plates of the second capacitor are respectively connected to the common terminal and to the inverting input connection of the differential-input amplifier, for charging the second capacitor to the input offset voltage error of that amplifier. During each of the second series of separated time intervals the first capacitor, the second capcitor and the input port of the differential input amplifier are connected in series between the inverted output signal terminal and the common terminal.

Auto-zeroing switched-capacitance buffer amplifiers with minus-unity

Current mirror amplifiers are disclosed, each having first and second ports that can be interchanged as to which is input port and which is output port in response to an electric control signal. A chopper-stabilized differential amplifier that uses such a switchable current mirror amplifier as a balanced-to-single-ended signal converter for output signals is disclosed, which chopper-stabilized differential amplifier is particularly suited for the integrating amplifier in a delta-sigma analog-to-digital converter.

Chopper-stabilized operational transconductance amplifier

A pipelined analog-to-digital converter architecture comprises three pipeline stages wherein the first stage includes a low-resolution flash A/D subconverter (10), two sample-and-hold amplifiers (12 and 14), two D/A converters (16 and 18), and two unity-gain buffers (20 and 22). Parallel-autozero analog processing is accomplished by alternately passing the analog signal through one or the other of two parallel processing channels. The sampled analog signal is delivered to the flash A/D subconverter and the D/A converters simultaneously. The residue from the D/A converters is delivered to the second stage, passing through a flash A/D subconverter (24), an additional D/A converter (26), and alternately through two comparators (28 and 30) each having a gain of eight. The second stage produces and delivers its residual voltage to the final pipeline stage comprising a flash A/D subconverter (32). The unity-gain buffers require a minimal gain-bandwidth product for a given sampling rate and allow the architecture to operate at high speed, while the first stage D/A converters provide good accuracy.

Pipelined analog-to-digital architecture with parallel-autozero analog

An approach to A/D converter architecture is based on a 'pipelined and submerged' architecture which includes a pipeline of elemental stages (10.sub.i). Each stage of the pipeline comprises a low-resolution flash A/D subconverter (12), a D/A converter (14), and a unity-gain buffer (16). To minimize converter nonlinearity due to component mismatches, a self calibration technique based on an 'interpolation' scheme is used. This technique employs an on-chip delta-sigma A/D converter (32) to provide the reference for calibration and a 100-bit memory (50) to store nonlinearity information. Long term drift is corrected by a calibrator (34) in parallel with data conversion.

Self-calibrating pipelined subranging analog-to-digital converter

An electronic watthour meter employs a first analog signal representing either a load current or voltage to pulse-width-modulate a second analog signal representing the other of the load current or voltage. The resulting signal contains a DC component proportional to the product of current and voltage. AC components are removed from the product signal in an integrator before applying the DC component to a threshold circuit. The threshold circuit alternates its output between positive and negative values each time the DC component of the product signal passes through a predetermined positive and negative value. This pulsed signal is transmitted to a register for integrating the energy usage. A pulse-width modulator produces a constant-frequency pulsed output whose positive and negative alternations have lengths which are proportional to the line signal it receives. At each alternation of the pulsed signal, the output of the pulse-width modulator alternates between a direct and an inverted signal. Thus, integration is driven in alternate directions, whereby offset signals of active circuits are balanced out.

Electronic watt-hour meter with up and down integration for error

Apparatus for producing a pulse width modulated signal in response to a current signal related to a current or a voltage in an electric system. A series resistor in series with a signal voltage proportional to the current or voltage in the system converts the signal voltage into the current signal. An integrator includes an operational amplifier with an integrating capacitor connected between an output and a first input thereof, producing a virtual ground at an input of the integrator. The series resistor is connected to the virtual ground. A second operational amplifier has a first input receiving an output of the integrator. A first bi-polarity trigger receives the output of the second operational amplifier. A resistive voltage divider is connected to an output of the first bi-polarity trigger, and a junction of the resistive voltage divider is connected to a second input of the second operational amplifier, so that a positive and a negative voltage at the junction provides first and second threshold voltages for the second operational amplifier. A second inverting bi-polarity trigger receives the output of the first bi-polarity trigger. A resistor receives an output voltage from the second inverting bi-polarity trigger and converts the output voltage to a second current signal. The second current signal is connected to the virtual ground so that an integration rate in the integrator is increased or decreased in proportion to an amplitude of the first current signal and a pulse width modulated signal is produced.

Pulse width modulator in an electronic watt-hour meter with up and down

An error signal, i.e., offset, noise or drift, is sampled in an input capacitor at an error sampling interval and held during the amplification interval. During the amplification interval, the signal is amplified offset-free. The circuit has two paths which operate alternately in such a way that the signal path is never interrupted, except for very brief intervals. Each of the two paths includes an operational amplifier, and the offset voltages of the two operational amplifiers are cancelled out automatically.

Continuous mode auto-zero offset amplifier or integrator

An electronic energy consumption measuring circuit capable of being fabricated on a single integrated circuit chip employs a switched-capacitor integrator for integrating the product of first and second voltages which are proportional, respectively, to load voltage and current in an electrical system to provide a measure of the energy being consumed, and a hysteresis comparator for converting the integrator output into a pulse train wherein each pulse represents a predetermined amount of energy. The output pulses may be accumulated and displayed to provide an indication of total energy consumed. A divider at the hysteresis comparator output enables the capacitor ratio in the switched-capacitor integrator to be reduced substantially so that the capacitor values are approximately the same order of magnitude. This reduces the chip area necessary for fabricating the capacitors and improves the matching between the capacitors, thereby affording higher integration accuracy.

Switched-capacitor watthour meter circuit having reduced capacitor ratio

Transient offset error voltages due to charge injection by MOS analog switches in switched-capacitor integrators of electronic metering circuits are compensated by use of a continuous switched input capacitor network on the inverting input of the integrator amplifier. Any residual charge injection not cancelled by the switched capacitor network is compensated by employing another switched capacitor network on the non-inverting input of the amplifier and by matching the geometries of the switches in the two networks so that the charge injected into each input of the amplifier is the same.

Continuous switched-capacitor dual slope watthour meter circuit with

A switched-capacitor integrator is employed in an electronic watthour measurement device for integrating the average component of a product signal formed by pulse-width modulating an analog signal proportional to one of a load current and voltage at a pulse duty ratio proportional to the other of the load current and voltage. A hysteresis comparator forces the direction of integration to alternate between positive and negative limits for balancing out offset voltages in the integrator and comparator. A triangular-wave generator employed as part of the pulse-width-modulation technique is also implemented using a switched-capacitor integrator. The switched-capacitor integrators permit fabrication of the circuit with the required accuracy without needing external, discrete time-constant-determining resistances and capacitances. Measurement accuracy is determined by the ratio of capacitances of two on-chip capacitors, the accuracy to a clock signal and two reference voltages. These parameters are closely controllable on a single MOS or CMOS chip using normal process control whereby the entire electronic watthour measurement device may be realized on a single chip without requiring off-chip components.

Solid state watthour meter with switched-capacitor integration

A transformerless, self-contained, low cost, small size, light weight solid state electronic watthour meter is described which employs thin film ferromagnetic current sensors of the type which are magnetically coupled to power conductors whose current flow is to be sensed and metered and which provides electrical isolation between the power conductors and the sensing and metering circuitry. The meter is self-contained in that it draws its operating direct current supply potential required to operate the meter directly from the power conductors being metered and does not require a separate battery or transformer coupled direct current power source. The entire meter circuitry, including the thin film ferromagnetic current sensors which can be fabricated by thin film technology and the direct current power supply and the watthour meter circuitry, all are susceptible of fabrication on a single substrate using semiconductor integrated circuit fabrication techniques.

Low cost self-contained transformerless solid state electronic watthour

Transient offset error voltages due to charge injection by MOS analog switches and DC offsets of multipliers in switched-capacitor integrators of electronic metering circuits are compensated by the common mode rejection of a differential switched-capacitor integrator. To cancel internal DC offset voltages of the integrator amplifier, a series capacitor connected to the inverting input of the amplifier is charged, during the autozero phase of the clock cycle, to a voltage equal to the internal DC offset voltage of the amplifier and subsequently, during the integration phase of the clock cycle, this voltage is applied to the inverting input of the amplifier.

Differential switched-capacitor dual slope watthour meter circuit

An electronic solid state Q-hour meter for measuring leading and lagging VARS quantities of electric power over a defined range of power factor. The Q-hour meter comprises first and second time division/pulse width-amplitude modulated/analog multiplier circuits. First and second current transformers are coupled to first and second phases of a multi-phase power supply to be monitored for deriving first and second analog circuit indicating signals which are supplied to respective analog current input terminals of the analog multipliers. First and second potential transformers are coupled across the first and second phases of the multi-phase power supply for deriving first and second analog voltage indicating signals that are supplied to respective input terminals of the first and second analog multiplier circuits. An electronic phase shifting circuit is connected intermediate the output of one of the potential transformers and the input terminal to one of the analog multiplier circuits for shifting the phase of the voltage indicating signal supplied thereto sixty degrees lagging. The outputs of the analog multiplier circuits are summed together to derive an output analog signal representative of a leading and lagging VARS quantities of electric power. By combining the solid state Q-hour meter with an electronic solid state kilowatt-hour meter a combination meter capable of measuring both kilowatt hours and Q-hours is provided.

Electronic solid state Q-hour meter and/or combination Q-hour and

An improved solid state semiconductor integrated circuit electronic watt/watthour meter circuit having analog and high frequency digital outputs with automatic error correction. The meter comprises first and second transformers for developing first and second voltage and current indicating signals for supply to a multiplier circuit that multiplies the two signals together and derives an output analog product signal representative of the instantaneous power being supplied by a source of electric energy. A multiplier low pass filter circuit is coupled to the output from the multiplier circuit for deriving from the product signal an average value power signal V. An analog-to-pulse rate converter is supplied with the average value power signal V and serves to convert it into a high frequency train of output signal pulses wherein each output signal pulse represents a predetermined quantized amount of electric energy. An automatic offset error correction circuit comprising polarity reversing switches is responsive to the output from the analog-to-pulse rate converter for automatically switching the polarity of the average value power signal V supplied to the analog-to-pulse rate converter midway through the quantizing period of the analog-to-pulse rate converter to cause an up/down integration of the average value power signal V over each quantizing period of operation and simultaneously producing a sequential addition/subtraction of like polarity offset error signals over each quantizing period of operation to thereby cancel out the offset error signals automatically.

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Scotia, NY, United States of America

Miran Milkovic